From d80f03e36954e3303efa498105969e7c486bf6a8 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 25 Apr 2021 14:11:36 -0400 Subject: [PATCH] Corrects longstanding deviation from naming convention. --- Processors/Z80/Implementation/Z80Base.cpp | 48 +++++++++---------- .../Z80/Implementation/Z80Implementation.hpp | 14 +++--- Processors/Z80/Implementation/Z80Storage.hpp | 2 +- Processors/Z80/State/State.cpp | 24 +++++----- Processors/Z80/State/State.hpp | 2 +- Storage/State/SNA.cpp | 8 ++-- 6 files changed, 49 insertions(+), 49 deletions(-) diff --git a/Processors/Z80/Implementation/Z80Base.cpp b/Processors/Z80/Implementation/Z80Base.cpp index c1c10943a..1516220d5 100644 --- a/Processors/Z80/Implementation/Z80Base.cpp +++ b/Processors/Z80/Implementation/Z80Base.cpp @@ -33,18 +33,18 @@ uint16_t ProcessorBase::get_value_of_register(Register r) const { case Register::L: return hl_.halves.low; case Register::HL: return hl_.full; - case Register::ADash: return afDash_.halves.high; - case Register::FlagsDash: return afDash_.halves.low; - case Register::AFDash: return afDash_.full; - case Register::BDash: return bcDash_.halves.high; - case Register::CDash: return bcDash_.halves.low; - case Register::BCDash: return bcDash_.full; - case Register::DDash: return deDash_.halves.high; - case Register::EDash: return deDash_.halves.low; - case Register::DEDash: return deDash_.full; - case Register::HDash: return hlDash_.halves.high; - case Register::LDash: return hlDash_.halves.low; - case Register::HLDash: return hlDash_.full; + case Register::ADash: return af_dash_.halves.high; + case Register::FlagsDash: return af_dash_.halves.low; + case Register::AFDash: return af_dash_.full; + case Register::BDash: return bc_dash_.halves.high; + case Register::CDash: return bc_dash_.halves.low; + case Register::BCDash: return bc_dash_.full; + case Register::DDash: return de_dash_.halves.high; + case Register::EDash: return de_dash_.halves.low; + case Register::DEDash: return de_dash_.full; + case Register::HDash: return hl_dash_.halves.high; + case Register::LDash: return hl_dash_.halves.low; + case Register::HLDash: return hl_dash_.full; case Register::IXh: return ix_.halves.high; case Register::IXl: return ix_.halves.low; @@ -86,18 +86,18 @@ void ProcessorBase::set_value_of_register(Register r, uint16_t value) { case Register::L: hl_.halves.low = uint8_t(value); break; case Register::HL: hl_.full = value; break; - case Register::ADash: afDash_.halves.high = uint8_t(value); break; - case Register::FlagsDash: afDash_.halves.low = uint8_t(value); break; - case Register::AFDash: afDash_.full = value; break; - case Register::BDash: bcDash_.halves.high = uint8_t(value); break; - case Register::CDash: bcDash_.halves.low = uint8_t(value); break; - case Register::BCDash: bcDash_.full = value; break; - case Register::DDash: deDash_.halves.high = uint8_t(value); break; - case Register::EDash: deDash_.halves.low = uint8_t(value); break; - case Register::DEDash: deDash_.full = value; break; - case Register::HDash: hlDash_.halves.high = uint8_t(value); break; - case Register::LDash: hlDash_.halves.low = uint8_t(value); break; - case Register::HLDash: hlDash_.full = value; break; + case Register::ADash: af_dash_.halves.high = uint8_t(value); break; + case Register::FlagsDash: af_dash_.halves.low = uint8_t(value); break; + case Register::AFDash: af_dash_.full = value; break; + case Register::BDash: bc_dash_.halves.high = uint8_t(value); break; + case Register::CDash: bc_dash_.halves.low = uint8_t(value); break; + case Register::BCDash: bc_dash_.full = value; break; + case Register::DDash: de_dash_.halves.high = uint8_t(value); break; + case Register::EDash: de_dash_.halves.low = uint8_t(value); break; + case Register::DEDash: de_dash_.full = value; break; + case Register::HDash: hl_dash_.halves.high = uint8_t(value); break; + case Register::LDash: hl_dash_.halves.low = uint8_t(value); break; + case Register::HLDash: hl_dash_.full = value; break; case Register::IXh: ix_.halves.high = uint8_t(value); break; case Register::IXl: ix_.halves.low = uint8_t(value); break; diff --git a/Processors/Z80/Implementation/Z80Implementation.hpp b/Processors/Z80/Implementation/Z80Implementation.hpp index 490e5f50f..56cf63fd9 100644 --- a/Processors/Z80/Implementation/Z80Implementation.hpp +++ b/Processors/Z80/Implementation/Z80Implementation.hpp @@ -461,17 +461,17 @@ template < class T, case MicroOp::ExAFAFDash: { const uint8_t a = a_; const uint8_t f = get_flags(); - set_flags(afDash_.halves.low); - a_ = afDash_.halves.high; - afDash_.halves.high = a; - afDash_.halves.low = f; + set_flags(af_dash_.halves.low); + a_ = af_dash_.halves.high; + af_dash_.halves.high = a; + af_dash_.halves.low = f; } break; case MicroOp::EXX: { uint16_t temp; - swap(de_, deDash_); - swap(bc_, bcDash_); - swap(hl_, hlDash_); + swap(de_, de_dash_); + swap(bc_, bc_dash_); + swap(hl_, hl_dash_); } break; #undef swap diff --git a/Processors/Z80/Implementation/Z80Storage.hpp b/Processors/Z80/Implementation/Z80Storage.hpp index 613e9334a..b88bf2a84 100644 --- a/Processors/Z80/Implementation/Z80Storage.hpp +++ b/Processors/Z80/Implementation/Z80Storage.hpp @@ -129,7 +129,7 @@ class ProcessorStorage { uint8_t a_; RegisterPair16 bc_, de_, hl_; - RegisterPair16 afDash_, bcDash_, deDash_, hlDash_; + RegisterPair16 af_dash_, bc_dash_, de_dash_, hl_dash_; RegisterPair16 ix_, iy_, pc_, sp_; RegisterPair16 ir_, refresh_addr_; bool iff1_ = false, iff2_ = false; diff --git a/Processors/Z80/State/State.cpp b/Processors/Z80/State/State.cpp index c9b90f2de..4f6f83fae 100644 --- a/Processors/Z80/State/State.cpp +++ b/Processors/Z80/State/State.cpp @@ -19,10 +19,10 @@ State::State(const ProcessorBase &src): State() { registers.bc = src.bc_.full; registers.de = src.de_.full; registers.hl = src.hl_.full; - registers.afDash = src.afDash_.full; - registers.bcDash = src.bcDash_.full; - registers.deDash = src.deDash_.full; - registers.hlDash = src.hlDash_.full; + registers.af_dash = src.af_dash_.full; + registers.bc_dash = src.bc_dash_.full; + registers.de_dash = src.de_dash_.full; + registers.hl_dash = src.hl_dash_.full; registers.ix = src.ix_.full; registers.iy = src.iy_.full; registers.ir = src.ir_.full; @@ -108,10 +108,10 @@ void State::apply(ProcessorBase &target) { target.bc_.full = registers.bc; target.de_.full = registers.de; target.hl_.full = registers.hl; - target.afDash_.full = registers.afDash; - target.bcDash_.full = registers.bcDash; - target.deDash_.full = registers.deDash; - target.hlDash_.full = registers.hlDash; + target.af_dash_.full = registers.af_dash; + target.bc_dash_.full = registers.bc_dash; + target.de_dash_.full = registers.de_dash; + target.hl_dash_.full = registers.hl_dash; target.ix_.full = registers.ix; target.iy_.full = registers.iy; target.ir_.full = registers.ir; @@ -179,10 +179,10 @@ State::Registers::Registers() { DeclareField(bc); DeclareField(de); DeclareField(hl); - DeclareField(afDash); - DeclareField(bcDash); - DeclareField(deDash); - DeclareField(hlDash); + DeclareField(af_dash); // TODO: is there any disadvantage to declaring these for reflective + DeclareField(bc_dash); // purposes as AF', BC', etc? + DeclareField(de_dash); + DeclareField(hl_dash); DeclareField(ix); DeclareField(iy); DeclareField(ir); diff --git a/Processors/Z80/State/State.hpp b/Processors/Z80/State/State.hpp index adce4d7f6..b074e38bf 100644 --- a/Processors/Z80/State/State.hpp +++ b/Processors/Z80/State/State.hpp @@ -31,7 +31,7 @@ struct State: public Reflection::StructImpl { uint8_t a; uint8_t flags; uint16_t bc, de, hl; - uint16_t afDash, bcDash, deDash, hlDash; + uint16_t af_dash, bc_dash, de_dash, hl_dash; uint16_t ix, iy, ir; uint16_t program_counter, stack_pointer; uint16_t memptr; diff --git a/Storage/State/SNA.cpp b/Storage/State/SNA.cpp index 7d29faf62..5daa42444 100644 --- a/Storage/State/SNA.cpp +++ b/Storage/State/SNA.cpp @@ -37,10 +37,10 @@ std::unique_ptr SNA::load(const std::string &file_name const uint8_t i = file.get8(); // 01 HL'; 03 DE'; 05 BC'; 07 AF' - state->z80.registers.hlDash = file.get16le(); - state->z80.registers.deDash = file.get16le(); - state->z80.registers.bcDash = file.get16le(); - state->z80.registers.afDash = file.get16le(); + state->z80.registers.hl_dash = file.get16le(); + state->z80.registers.de_dash = file.get16le(); + state->z80.registers.bc_dash = file.get16le(); + state->z80.registers.af_dash = file.get16le(); // 09 HL; 0B DE; 0D BC; 0F IY; 11 IX state->z80.registers.hl = file.get16le();