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Attempts a full implementation of MVN and MVP.
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@ -106,6 +106,18 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
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decrement_data_address();
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break;
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case CycleFetchBlockX:
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read(((instruction_buffer_.value & 0xff00) << 8) | (x_.full & x_masks_[1]), data_buffer_.any_byte());
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break;
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case CycleFetchBlockY:
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read(((instruction_buffer_.value & 0xff00) << 8) | (y_.full & x_masks_[1]), &throwaway);
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break;
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case CycleStoreBlockY:
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write(((instruction_buffer_.value & 0xff00) << 8) | (y_.full & x_masks_[1]), data_buffer_.any_byte());
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break;
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#undef increment_data_address
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#undef decrement_data_address
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@ -254,9 +266,25 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
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instruction_buffer_.value = old_pc;
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} break;
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case JSL: {
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//
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// Block moves.
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//
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} break;
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case MVP:
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data_bank_ = (instruction_buffer_.value & 0xff) << 16;
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--x_.full;
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--y_.full;
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--a_.full;
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if(a_.full) pc_ -= 3;
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break;
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case MVN:
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data_bank_ = (instruction_buffer_.value & 0xff) << 16;
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++x_.full;
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++y_.full;
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--a_.full;
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if(a_.full) pc_ -= 3;
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break;
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default:
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assert(false);
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@ -253,6 +253,10 @@ struct ProcessorStorage {
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return byte(size);
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}
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uint8_t *any_byte() {
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return reinterpret_cast<uint8_t *>(&value);
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}
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private:
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uint8_t *byte(int pointer) {
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#if TARGET_RT_BIG_ENDIAN
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