From d9097facf1a9b4ecce4046a93b7be77be90a51b4 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Fri, 4 Aug 2017 08:56:09 -0400 Subject: [PATCH] Found documentation that makes more sense, and in practice seems to be more correct: the test after vertical sync is for greater than 32, not less. Also I decided to chance my arm on counter reset also resetting interrupt request. The raster effects of Ghouls 'n' Ghosts is now pretty much correct but one line off. I think probably either something is off in my wait-two logic on the post-vsync timer event, or possibly the vsync bit exposed via the PPI doesn't mean exactly what I think it means. --- Machines/AmstradCPC/AmstradCPC.cpp | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/Machines/AmstradCPC/AmstradCPC.cpp b/Machines/AmstradCPC/AmstradCPC.cpp index 796d7b4e8..469473243 100644 --- a/Machines/AmstradCPC/AmstradCPC.cpp +++ b/Machines/AmstradCPC/AmstradCPC.cpp @@ -30,9 +30,9 @@ class InterruptTimer { InterruptTimer() : timer_(0), interrupt_request_(false) {} /*! - Indicates that a new hsync pulse has been recognised. Per documentation - difficulties, it is not presently clear to me whether this should be - the leading or trailing edge of horizontal sync. + Indicates that a new hsync pulse has been recognised. This should be + supplied on the falling edge of the CRTC HSYNC signal, which is the + trailing edge because it is active high. */ inline void signal_hsync() { // Increment the timer and if it has hit 52 then reset it and @@ -49,7 +49,7 @@ class InterruptTimer { if(reset_counter_) { reset_counter_--; if(!reset_counter_) { - if(timer_ < 32) { + if(timer_ & 32) { interrupt_request_ = true; } timer_ = 0; @@ -76,6 +76,7 @@ class InterruptTimer { /// Resets the timer. inline void reset_count() { timer_ = 0; + interrupt_request_ = false; } private: