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https://github.com/TomHarte/CLK.git
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Ensures neither the ColecoVision nor the MSX processes mid-cycles.
This commit is contained in:
Thomas Harte
parent
e511261b04
commit
d9e65cd758
@ -197,131 +197,134 @@ class ConcreteMachine:
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time_since_vdp_update_ += length;
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time_since_sn76489_update_ += length;
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uint16_t address = cycle.address ? *cycle.address : 0x0000;
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switch(cycle.operation) {
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case CPU::Z80::PartialMachineCycle::ReadOpcode:
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if(!address) pc_zero_accesses_++;
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case CPU::Z80::PartialMachineCycle::Read:
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if(address < 0x2000) {
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if(super_game_module_.replace_bios) {
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// Act only if necessary.
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if(cycle.is_terminal()) {
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uint16_t address = cycle.address ? *cycle.address : 0x0000;
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switch(cycle.operation) {
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case CPU::Z80::PartialMachineCycle::ReadOpcode:
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if(!address) pc_zero_accesses_++;
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case CPU::Z80::PartialMachineCycle::Read:
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if(address < 0x2000) {
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if(super_game_module_.replace_bios) {
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*cycle.value = super_game_module_.ram[address];
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} else {
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*cycle.value = bios_[address];
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}
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} else if(super_game_module_.replace_ram && address < 0x8000) {
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*cycle.value = super_game_module_.ram[address];
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} else if(address >= 0x6000 && address < 0x8000) {
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*cycle.value = ram_[address & 1023];
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} else if(address >= 0x8000 && address <= cartridge_address_limit_) {
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if(is_megacart_ && address >= 0xffc0) {
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page_megacart(address);
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}
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*cycle.value = cartridge_pages_[(address >> 14)&1][address&0x3fff];
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} else {
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*cycle.value = bios_[address];
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*cycle.value = 0xff;
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}
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} else if(super_game_module_.replace_ram && address < 0x8000) {
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*cycle.value = super_game_module_.ram[address];
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} else if(address >= 0x6000 && address < 0x8000) {
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*cycle.value = ram_[address & 1023];
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} else if(address >= 0x8000 && address <= cartridge_address_limit_) {
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if(is_megacart_ && address >= 0xffc0) {
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break;
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case CPU::Z80::PartialMachineCycle::Write:
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if(super_game_module_.replace_bios && address < 0x2000) {
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super_game_module_.ram[address] = *cycle.value;
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} else if(super_game_module_.replace_ram && address >= 0x2000 && address < 0x8000) {
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super_game_module_.ram[address] = *cycle.value;
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} else if(address >= 0x6000 && address < 0x8000) {
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ram_[address & 1023] = *cycle.value;
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} else if(is_megacart_ && address >= 0xffc0) {
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page_megacart(address);
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}
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*cycle.value = cartridge_pages_[(address >> 14)&1][address&0x3fff];
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} else {
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*cycle.value = 0xff;
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}
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break;
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break;
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case CPU::Z80::PartialMachineCycle::Write:
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if(super_game_module_.replace_bios && address < 0x2000) {
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super_game_module_.ram[address] = *cycle.value;
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} else if(super_game_module_.replace_ram && address >= 0x2000 && address < 0x8000) {
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super_game_module_.ram[address] = *cycle.value;
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} else if(address >= 0x6000 && address < 0x8000) {
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ram_[address & 1023] = *cycle.value;
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} else if(is_megacart_ && address >= 0xffc0) {
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page_megacart(address);
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}
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break;
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case CPU::Z80::PartialMachineCycle::Input:
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switch((address >> 5) & 7) {
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case 5:
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update_video();
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*cycle.value = vdp_->get_register(address);
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z80_.set_non_maskable_interrupt_line(vdp_->get_interrupt_line());
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time_until_interrupt_ = vdp_->get_time_until_interrupt();
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break;
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case CPU::Z80::PartialMachineCycle::Input:
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switch((address >> 5) & 7) {
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case 5:
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update_video();
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*cycle.value = vdp_->get_register(address);
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z80_.set_non_maskable_interrupt_line(vdp_->get_interrupt_line());
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time_until_interrupt_ = vdp_->get_time_until_interrupt();
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break;
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case 7: {
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const std::size_t joystick_id = (address&2) >> 1;
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Joystick *joystick = static_cast<Joystick *>(joysticks_[joystick_id].get());
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if(joysticks_in_keypad_mode_) {
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*cycle.value = joystick->get_keypad_input();
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} else {
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*cycle.value = joystick->get_direction_input();
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}
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case 7: {
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const std::size_t joystick_id = (address&2) >> 1;
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Joystick *joystick = static_cast<Joystick *>(joysticks_[joystick_id].get());
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if(joysticks_in_keypad_mode_) {
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*cycle.value = joystick->get_keypad_input();
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} else {
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*cycle.value = joystick->get_direction_input();
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}
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// Hitting exactly the recommended joypad input port is an indicator that
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// this really is a ColecoVision game. The BIOS won't do this when just waiting
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// to start a game (unlike accessing the VDP and SN).
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if((address&0xfc) == 0xfc) confidence_counter_.add_hit();
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} break;
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// Hitting exactly the recommended joypad input port is an indicator that
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// this really is a ColecoVision game. The BIOS won't do this when just waiting
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// to start a game (unlike accessing the VDP and SN).
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if((address&0xfc) == 0xfc) confidence_counter_.add_hit();
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} break;
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default:
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switch(address&0xff) {
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default: *cycle.value = 0xff; break;
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case 0x52:
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// Read AY data.
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update_audio();
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ay_.set_control_lines(GI::AY38910::ControlLines(GI::AY38910::BC2 | GI::AY38910::BC1));
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*cycle.value = ay_.get_data_output();
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ay_.set_control_lines(GI::AY38910::ControlLines(0));
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break;
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}
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break;
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}
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break;
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default:
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switch(address&0xff) {
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default: *cycle.value = 0xff; break;
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case 0x52:
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// Read AY data.
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update_audio();
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ay_.set_control_lines(GI::AY38910::ControlLines(GI::AY38910::BC2 | GI::AY38910::BC1));
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*cycle.value = ay_.get_data_output();
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ay_.set_control_lines(GI::AY38910::ControlLines(0));
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break;
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}
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break;
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}
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break;
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case CPU::Z80::PartialMachineCycle::Output: {
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const int eighth = (address >> 5) & 7;
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switch(eighth) {
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case 4: case 6:
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joysticks_in_keypad_mode_ = eighth == 4;
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break;
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case CPU::Z80::PartialMachineCycle::Output: {
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const int eighth = (address >> 5) & 7;
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switch(eighth) {
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case 4: case 6:
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joysticks_in_keypad_mode_ = eighth == 4;
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break;
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case 5:
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update_video();
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vdp_->set_register(address, *cycle.value);
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z80_.set_non_maskable_interrupt_line(vdp_->get_interrupt_line());
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time_until_interrupt_ = vdp_->get_time_until_interrupt();
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break;
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case 5:
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update_video();
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vdp_->set_register(address, *cycle.value);
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z80_.set_non_maskable_interrupt_line(vdp_->get_interrupt_line());
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time_until_interrupt_ = vdp_->get_time_until_interrupt();
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break;
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case 7:
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update_audio();
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sn76489_.set_register(*cycle.value);
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break;
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case 7:
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update_audio();
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sn76489_.set_register(*cycle.value);
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break;
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default:
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// Catch Super Game Module accesses; it decodes more thoroughly.
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switch(address&0xff) {
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default: break;
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case 0x7f:
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super_game_module_.replace_bios = !((*cycle.value)&0x2);
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break;
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case 0x50:
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// Set AY address.
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update_audio();
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ay_.set_control_lines(GI::AY38910::BC1);
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ay_.set_data_input(*cycle.value);
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ay_.set_control_lines(GI::AY38910::ControlLines(0));
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break;
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case 0x51:
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// Set AY data.
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update_audio();
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ay_.set_control_lines(GI::AY38910::ControlLines(GI::AY38910::BC2 | GI::AY38910::BDIR));
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ay_.set_data_input(*cycle.value);
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ay_.set_control_lines(GI::AY38910::ControlLines(0));
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break;
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case 0x53:
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super_game_module_.replace_ram = !!((*cycle.value)&0x1);
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break;
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}
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break;
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}
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} break;
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default:
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// Catch Super Game Module accesses; it decodes more thoroughly.
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switch(address&0xff) {
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default: break;
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case 0x7f:
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super_game_module_.replace_bios = !((*cycle.value)&0x2);
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break;
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case 0x50:
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// Set AY address.
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update_audio();
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ay_.set_control_lines(GI::AY38910::BC1);
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ay_.set_data_input(*cycle.value);
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ay_.set_control_lines(GI::AY38910::ControlLines(0));
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break;
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case 0x51:
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// Set AY data.
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update_audio();
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ay_.set_control_lines(GI::AY38910::ControlLines(GI::AY38910::BC2 | GI::AY38910::BDIR));
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ay_.set_data_input(*cycle.value);
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ay_.set_control_lines(GI::AY38910::ControlLines(0));
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break;
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case 0x53:
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super_game_module_.replace_ram = !!((*cycle.value)&0x1);
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break;
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}
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break;
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}
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} break;
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default: break;
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default: break;
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}
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}
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if(time_until_interrupt_ > 0) {
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@ -361,183 +361,185 @@ class ConcreteMachine:
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memory_slots_[2].cycles_since_update += total_length;
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memory_slots_[3].cycles_since_update += total_length;
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uint16_t address = cycle.address ? *cycle.address : 0x0000;
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switch(cycle.operation) {
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case CPU::Z80::PartialMachineCycle::ReadOpcode:
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if(use_fast_tape_) {
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if(address == 0x1a63) {
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// TAPION
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if(cycle.is_terminal()) {
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uint16_t address = cycle.address ? *cycle.address : 0x0000;
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switch(cycle.operation) {
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case CPU::Z80::PartialMachineCycle::ReadOpcode:
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if(use_fast_tape_) {
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if(address == 0x1a63) {
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// TAPION
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// Enable the tape motor.
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i8255_.set_register(0xab, 0x8);
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// Enable the tape motor.
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i8255_.set_register(0xab, 0x8);
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// Disable interrupts.
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z80_.set_value_of_register(CPU::Z80::Register::IFF1, 0);
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z80_.set_value_of_register(CPU::Z80::Register::IFF2, 0);
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// Disable interrupts.
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z80_.set_value_of_register(CPU::Z80::Register::IFF1, 0);
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z80_.set_value_of_register(CPU::Z80::Register::IFF2, 0);
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// Use the parser to find a header, and if one is found then populate
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// LOWLIM and WINWID, and reset carry. Otherwise set carry.
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using Parser = Storage::Tape::MSX::Parser;
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std::unique_ptr<Parser::FileSpeed> new_speed = Parser::find_header(tape_player_);
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if(new_speed) {
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ram_[0xfca4] = new_speed->minimum_start_bit_duration;
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ram_[0xfca5] = new_speed->low_high_disrimination_duration;
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z80_.set_value_of_register(CPU::Z80::Register::Flags, 0);
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} else {
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z80_.set_value_of_register(CPU::Z80::Register::Flags, 1);
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// Use the parser to find a header, and if one is found then populate
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// LOWLIM and WINWID, and reset carry. Otherwise set carry.
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using Parser = Storage::Tape::MSX::Parser;
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std::unique_ptr<Parser::FileSpeed> new_speed = Parser::find_header(tape_player_);
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if(new_speed) {
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ram_[0xfca4] = new_speed->minimum_start_bit_duration;
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ram_[0xfca5] = new_speed->low_high_disrimination_duration;
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z80_.set_value_of_register(CPU::Z80::Register::Flags, 0);
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} else {
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z80_.set_value_of_register(CPU::Z80::Register::Flags, 1);
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}
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// RET.
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*cycle.value = 0xc9;
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break;
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}
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// RET.
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*cycle.value = 0xc9;
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break;
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}
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if(address == 0x1abc) {
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// TAPIN
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if(address == 0x1abc) {
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// TAPIN
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// Grab the current values of LOWLIM and WINWID.
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using Parser = Storage::Tape::MSX::Parser;
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Parser::FileSpeed tape_speed;
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tape_speed.minimum_start_bit_duration = ram_[0xfca4];
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tape_speed.low_high_disrimination_duration = ram_[0xfca5];
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// Grab the current values of LOWLIM and WINWID.
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using Parser = Storage::Tape::MSX::Parser;
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Parser::FileSpeed tape_speed;
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tape_speed.minimum_start_bit_duration = ram_[0xfca4];
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tape_speed.low_high_disrimination_duration = ram_[0xfca5];
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// Ask the tape parser to grab a byte.
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int next_byte = Parser::get_byte(tape_speed, tape_player_);
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// Ask the tape parser to grab a byte.
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int next_byte = Parser::get_byte(tape_speed, tape_player_);
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// If a byte was found, return it with carry unset. Otherwise set carry to
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// indicate error.
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if(next_byte >= 0) {
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z80_.set_value_of_register(CPU::Z80::Register::A, static_cast<uint16_t>(next_byte));
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z80_.set_value_of_register(CPU::Z80::Register::Flags, 0);
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} else {
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z80_.set_value_of_register(CPU::Z80::Register::Flags, 1);
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}
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// If a byte was found, return it with carry unset. Otherwise set carry to
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// indicate error.
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if(next_byte >= 0) {
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z80_.set_value_of_register(CPU::Z80::Register::A, static_cast<uint16_t>(next_byte));
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z80_.set_value_of_register(CPU::Z80::Register::Flags, 0);
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} else {
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z80_.set_value_of_register(CPU::Z80::Register::Flags, 1);
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// RET.
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*cycle.value = 0xc9;
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break;
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}
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// RET.
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*cycle.value = 0xc9;
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break;
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}
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}
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if(!address) {
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pc_zero_accesses_++;
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}
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if(read_pointers_[address >> 13] == unpopulated_) {
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performed_unmapped_access_ = true;
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}
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pc_address_ = address; // This is retained so as to be able to name the source of an access to cartridge handlers.
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case CPU::Z80::PartialMachineCycle::Read:
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if(read_pointers_[address >> 13]) {
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*cycle.value = read_pointers_[address >> 13][address & 8191];
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} else {
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if(!address) {
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pc_zero_accesses_++;
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}
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if(read_pointers_[address >> 13] == unpopulated_) {
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performed_unmapped_access_ = true;
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}
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pc_address_ = address; // This is retained so as to be able to name the source of an access to cartridge handlers.
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case CPU::Z80::PartialMachineCycle::Read:
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if(read_pointers_[address >> 13]) {
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*cycle.value = read_pointers_[address >> 13][address & 8191];
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} else {
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int slot_hit = (paged_memory_ >> ((address >> 14) * 2)) & 3;
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memory_slots_[slot_hit].handler->run_for(memory_slots_[slot_hit].cycles_since_update.flush());
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*cycle.value = memory_slots_[slot_hit].handler->read(address);
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}
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break;
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case CPU::Z80::PartialMachineCycle::Write: {
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write_pointers_[address >> 13][address & 8191] = *cycle.value;
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int slot_hit = (paged_memory_ >> ((address >> 14) * 2)) & 3;
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memory_slots_[slot_hit].handler->run_for(memory_slots_[slot_hit].cycles_since_update.flush());
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*cycle.value = memory_slots_[slot_hit].handler->read(address);
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}
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break;
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case CPU::Z80::PartialMachineCycle::Write: {
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write_pointers_[address >> 13][address & 8191] = *cycle.value;
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int slot_hit = (paged_memory_ >> ((address >> 14) * 2)) & 3;
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if(memory_slots_[slot_hit].handler) {
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update_audio();
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memory_slots_[slot_hit].handler->run_for(memory_slots_[slot_hit].cycles_since_update.flush());
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memory_slots_[slot_hit].handler->write(address, *cycle.value, read_pointers_[pc_address_ >> 13] != memory_slots_[0].read_pointers[pc_address_ >> 13]);
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}
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} break;
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case CPU::Z80::PartialMachineCycle::Input:
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switch(address & 0xff) {
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case 0x98: case 0x99:
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vdp_->run_for(time_since_vdp_update_.flush());
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*cycle.value = vdp_->get_register(address);
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z80_.set_interrupt_line(vdp_->get_interrupt_line());
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time_until_interrupt_ = vdp_->get_time_until_interrupt();
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break;
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case 0xa2:
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if(memory_slots_[slot_hit].handler) {
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update_audio();
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ay_.set_control_lines(static_cast<GI::AY38910::ControlLines>(GI::AY38910::BC2 | GI::AY38910::BC1));
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*cycle.value = ay_.get_data_output();
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ay_.set_control_lines(static_cast<GI::AY38910::ControlLines>(0));
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break;
|
||||
|
||||
case 0xa8: case 0xa9:
|
||||
case 0xaa: case 0xab:
|
||||
*cycle.value = i8255_.get_register(address);
|
||||
break;
|
||||
|
||||
default:
|
||||
*cycle.value = 0xff;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case CPU::Z80::PartialMachineCycle::Output: {
|
||||
const int port = address & 0xff;
|
||||
switch(port) {
|
||||
case 0x98: case 0x99:
|
||||
vdp_->run_for(time_since_vdp_update_.flush());
|
||||
vdp_->set_register(address, *cycle.value);
|
||||
z80_.set_interrupt_line(vdp_->get_interrupt_line());
|
||||
time_until_interrupt_ = vdp_->get_time_until_interrupt();
|
||||
break;
|
||||
|
||||
case 0xa0: case 0xa1:
|
||||
update_audio();
|
||||
ay_.set_control_lines(static_cast<GI::AY38910::ControlLines>(GI::AY38910::BDIR | GI::AY38910::BC2 | ((port == 0xa0) ? GI::AY38910::BC1 : 0)));
|
||||
ay_.set_data_input(*cycle.value);
|
||||
ay_.set_control_lines(static_cast<GI::AY38910::ControlLines>(0));
|
||||
break;
|
||||
|
||||
case 0xa8: case 0xa9:
|
||||
case 0xaa: case 0xab:
|
||||
i8255_.set_register(address, *cycle.value);
|
||||
break;
|
||||
|
||||
case 0xfc: case 0xfd: case 0xfe: case 0xff:
|
||||
// printf("RAM banking %02x: %02x\n", port, *cycle.value);
|
||||
break;
|
||||
}
|
||||
} break;
|
||||
|
||||
case CPU::Z80::PartialMachineCycle::Interrupt:
|
||||
*cycle.value = 0xff;
|
||||
|
||||
// Take this as a convenient moment to jump into the keyboard buffer, if desired.
|
||||
if(!input_text_.empty()) {
|
||||
// The following are KEYBUF per the Red Book; its address and its definition as DEFS 40.
|
||||
const int buffer_start = 0xfbf0;
|
||||
const int buffer_size = 40;
|
||||
|
||||
// Also from the Red Book: GETPNT is at F3FAH and PUTPNT is at F3F8H.
|
||||
int read_address = ram_[0xf3fa] | (ram_[0xf3fb] << 8);
|
||||
int write_address = ram_[0xf3f8] | (ram_[0xf3f9] << 8);
|
||||
|
||||
// Write until either the string is exhausted or the write_pointer is immediately
|
||||
// behind the read pointer; temporarily map write_address and read_address into
|
||||
// buffer-relative values.
|
||||
std::size_t characters_written = 0;
|
||||
write_address -= buffer_start;
|
||||
read_address -= buffer_start;
|
||||
while(characters_written < input_text_.size()) {
|
||||
const int next_write_address = (write_address + 1) % buffer_size;
|
||||
if(next_write_address == read_address) break;
|
||||
ram_[write_address + buffer_start] = static_cast<uint8_t>(input_text_[characters_written]);
|
||||
++characters_written;
|
||||
write_address = next_write_address;
|
||||
memory_slots_[slot_hit].handler->run_for(memory_slots_[slot_hit].cycles_since_update.flush());
|
||||
memory_slots_[slot_hit].handler->write(address, *cycle.value, read_pointers_[pc_address_ >> 13] != memory_slots_[0].read_pointers[pc_address_ >> 13]);
|
||||
}
|
||||
input_text_.erase(input_text_.begin(), input_text_.begin() + static_cast<std::string::difference_type>(characters_written));
|
||||
} break;
|
||||
|
||||
// Map the write address back into absolute terms and write it out again as PUTPNT.
|
||||
write_address += buffer_start;
|
||||
ram_[0xf3f8] = static_cast<uint8_t>(write_address);
|
||||
ram_[0xf3f9] = static_cast<uint8_t>(write_address >> 8);
|
||||
}
|
||||
break;
|
||||
case CPU::Z80::PartialMachineCycle::Input:
|
||||
switch(address & 0xff) {
|
||||
case 0x98: case 0x99:
|
||||
vdp_->run_for(time_since_vdp_update_.flush());
|
||||
*cycle.value = vdp_->get_register(address);
|
||||
z80_.set_interrupt_line(vdp_->get_interrupt_line());
|
||||
time_until_interrupt_ = vdp_->get_time_until_interrupt();
|
||||
break;
|
||||
|
||||
default: break;
|
||||
case 0xa2:
|
||||
update_audio();
|
||||
ay_.set_control_lines(static_cast<GI::AY38910::ControlLines>(GI::AY38910::BC2 | GI::AY38910::BC1));
|
||||
*cycle.value = ay_.get_data_output();
|
||||
ay_.set_control_lines(static_cast<GI::AY38910::ControlLines>(0));
|
||||
break;
|
||||
|
||||
case 0xa8: case 0xa9:
|
||||
case 0xaa: case 0xab:
|
||||
*cycle.value = i8255_.get_register(address);
|
||||
break;
|
||||
|
||||
default:
|
||||
*cycle.value = 0xff;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case CPU::Z80::PartialMachineCycle::Output: {
|
||||
const int port = address & 0xff;
|
||||
switch(port) {
|
||||
case 0x98: case 0x99:
|
||||
vdp_->run_for(time_since_vdp_update_.flush());
|
||||
vdp_->set_register(address, *cycle.value);
|
||||
z80_.set_interrupt_line(vdp_->get_interrupt_line());
|
||||
time_until_interrupt_ = vdp_->get_time_until_interrupt();
|
||||
break;
|
||||
|
||||
case 0xa0: case 0xa1:
|
||||
update_audio();
|
||||
ay_.set_control_lines(static_cast<GI::AY38910::ControlLines>(GI::AY38910::BDIR | GI::AY38910::BC2 | ((port == 0xa0) ? GI::AY38910::BC1 : 0)));
|
||||
ay_.set_data_input(*cycle.value);
|
||||
ay_.set_control_lines(static_cast<GI::AY38910::ControlLines>(0));
|
||||
break;
|
||||
|
||||
case 0xa8: case 0xa9:
|
||||
case 0xaa: case 0xab:
|
||||
i8255_.set_register(address, *cycle.value);
|
||||
break;
|
||||
|
||||
case 0xfc: case 0xfd: case 0xfe: case 0xff:
|
||||
// printf("RAM banking %02x: %02x\n", port, *cycle.value);
|
||||
break;
|
||||
}
|
||||
} break;
|
||||
|
||||
case CPU::Z80::PartialMachineCycle::Interrupt:
|
||||
*cycle.value = 0xff;
|
||||
|
||||
// Take this as a convenient moment to jump into the keyboard buffer, if desired.
|
||||
if(!input_text_.empty()) {
|
||||
// The following are KEYBUF per the Red Book; its address and its definition as DEFS 40.
|
||||
const int buffer_start = 0xfbf0;
|
||||
const int buffer_size = 40;
|
||||
|
||||
// Also from the Red Book: GETPNT is at F3FAH and PUTPNT is at F3F8H.
|
||||
int read_address = ram_[0xf3fa] | (ram_[0xf3fb] << 8);
|
||||
int write_address = ram_[0xf3f8] | (ram_[0xf3f9] << 8);
|
||||
|
||||
// Write until either the string is exhausted or the write_pointer is immediately
|
||||
// behind the read pointer; temporarily map write_address and read_address into
|
||||
// buffer-relative values.
|
||||
std::size_t characters_written = 0;
|
||||
write_address -= buffer_start;
|
||||
read_address -= buffer_start;
|
||||
while(characters_written < input_text_.size()) {
|
||||
const int next_write_address = (write_address + 1) % buffer_size;
|
||||
if(next_write_address == read_address) break;
|
||||
ram_[write_address + buffer_start] = static_cast<uint8_t>(input_text_[characters_written]);
|
||||
++characters_written;
|
||||
write_address = next_write_address;
|
||||
}
|
||||
input_text_.erase(input_text_.begin(), input_text_.begin() + static_cast<std::string::difference_type>(characters_written));
|
||||
|
||||
// Map the write address back into absolute terms and write it out again as PUTPNT.
|
||||
write_address += buffer_start;
|
||||
ram_[0xf3f8] = static_cast<uint8_t>(write_address);
|
||||
ram_[0xf3f9] = static_cast<uint8_t>(write_address >> 8);
|
||||
}
|
||||
break;
|
||||
|
||||
default: break;
|
||||
}
|
||||
}
|
||||
|
||||
if(!tape_player_is_sleeping_)
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user