6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-26 08:49:37 +00:00
Code Issues Projects Releases Wiki Activity

Had neglected to count refresh time in my interrupt programs. Corrected. Mode 0 timing test succeeds again. Only Mode 2 is now at fault.

Browse Source
This commit is contained in:
Thomas Harte 2017-06-21 18:58:44 -04:00
parent 10cc94f581
commit db743c90d8
1 changed files with 5 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
Processors/Z80/Z80.hpp
View File

@ -790,19 +790,21 @@ template <class T> class Processor {
};
MicroOp irq_mode0_program[] = {
{ MicroOp::BeginIRQMode0 },
BusOp(IntAck(6)),
BusOp(IntAck(4)),
{ MicroOp::DecodeOperationNoRChange }
};
MicroOp irq_mode1_program[] = {
{ MicroOp::BeginIRQ },
BusOp(IntAck(7)),
BusOp(IntAck(5)),
BusOp(Refresh(2)),
Push(pc_),
{ MicroOp::Move16, &temp16_.full, &pc_.full },
{ MicroOp::MoveToNextProgram }
};
MicroOp irq_mode2_program[] = {
{ MicroOp::BeginIRQ },
BusOp(IntAck(7)),
BusOp(IntAck(5)),
BusOp(Refresh(2)),
Push(pc_),
{ MicroOp::Move8, &ir_.bytes.high, &temp16_.bytes.high },
Read16(pc_, temp16_),