mirror of
https://github.com/TomHarte/CLK.git
synced 2025-02-18 01:30:56 +00:00
Imports CMPA tests, and fixes CMPA.w.
This commit is contained in:
parent
ba2224dd06
commit
dbdbea85c2
@ -1981,6 +1981,77 @@ class CPU::MC68000::ProcessorStorageTests {
|
|||||||
XCTAssertEqual(20, _machine->get_cycle_count());
|
XCTAssertEqual(20, _machine->get_cycle_count());
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// MARK: CMPA
|
||||||
|
|
||||||
|
- (void)performCMPAld1:(uint32_t)d1 a2:(uint32_t)a2 {
|
||||||
|
_machine->set_program({
|
||||||
|
0xb5c1 // CMPA.l D1, A2
|
||||||
|
});
|
||||||
|
auto state = _machine->get_processor_state();
|
||||||
|
state.data[1] = d1;
|
||||||
|
state.address[2] = a2;
|
||||||
|
|
||||||
|
_machine->set_processor_state(state);
|
||||||
|
_machine->run_for_instructions(1);
|
||||||
|
|
||||||
|
state = _machine->get_processor_state();
|
||||||
|
XCTAssertEqual(state.data[1], d1);
|
||||||
|
XCTAssertEqual(state.address[2], a2);
|
||||||
|
XCTAssertEqual(6, _machine->get_cycle_count());
|
||||||
|
}
|
||||||
|
|
||||||
|
- (void)testCMPAl_noFlags {
|
||||||
|
[self performCMPAld1:0x1234567f a2:0x12345680];
|
||||||
|
|
||||||
|
const auto state = _machine->get_processor_state();
|
||||||
|
XCTAssertEqual(state.status & Flag::ConditionCodes, 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
- (void)testCMPAl_carry {
|
||||||
|
[self performCMPAld1:0xfd234577 a2:0x12345680];
|
||||||
|
|
||||||
|
const auto state = _machine->get_processor_state();
|
||||||
|
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Carry);
|
||||||
|
}
|
||||||
|
|
||||||
|
- (void)testCMPAl_carryOverflowNegative {
|
||||||
|
[self performCMPAld1:0x85678943 a2:0x22563245];
|
||||||
|
|
||||||
|
const auto state = _machine->get_processor_state();
|
||||||
|
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Carry | Flag::Overflow | Flag::Negative);
|
||||||
|
}
|
||||||
|
|
||||||
|
- (void)performCMPAwd1:(uint32_t)d1 a2:(uint32_t)a2 {
|
||||||
|
_machine->set_program({
|
||||||
|
0xb4c1 // CMPA.w D1, A2
|
||||||
|
});
|
||||||
|
auto state = _machine->get_processor_state();
|
||||||
|
state.data[1] = d1;
|
||||||
|
state.address[2] = a2;
|
||||||
|
|
||||||
|
_machine->set_processor_state(state);
|
||||||
|
_machine->run_for_instructions(1);
|
||||||
|
|
||||||
|
state = _machine->get_processor_state();
|
||||||
|
XCTAssertEqual(state.data[1], d1);
|
||||||
|
XCTAssertEqual(state.address[2], a2);
|
||||||
|
XCTAssertEqual(6, _machine->get_cycle_count());
|
||||||
|
}
|
||||||
|
|
||||||
|
- (void)testCMPAw_carry {
|
||||||
|
[self performCMPAwd1:0x85678943 a2:0x22563245];
|
||||||
|
|
||||||
|
const auto state = _machine->get_processor_state();
|
||||||
|
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Carry);
|
||||||
|
}
|
||||||
|
|
||||||
|
- (void)testCMPAw_zero {
|
||||||
|
[self performCMPAwd1:0x0000ffff a2:0xffffffff];
|
||||||
|
|
||||||
|
const auto state = _machine->get_processor_state();
|
||||||
|
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Zero);
|
||||||
|
}
|
||||||
|
|
||||||
// MARK: CMPM
|
// MARK: CMPM
|
||||||
|
|
||||||
- (void)testCMPMl {
|
- (void)testCMPMl {
|
||||||
|
@ -762,6 +762,17 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
|
|||||||
overflow_flag_ = sub_overflow() & 0x8000;
|
overflow_flag_ = sub_overflow() & 0x8000;
|
||||||
} break;
|
} break;
|
||||||
|
|
||||||
|
case Operation::CMPAw: {
|
||||||
|
const auto source = uint64_t(u_extend16(active_program_->source->halves.low.full));
|
||||||
|
const auto destination = uint64_t(u_extend16(active_program_->destination->halves.low.full));
|
||||||
|
const auto result = destination - source;
|
||||||
|
|
||||||
|
zero_result_ = uint32_t(result);
|
||||||
|
carry_flag_ = result >> 32;
|
||||||
|
negative_flag_ = result & 0x80000000;
|
||||||
|
overflow_flag_ = sub_overflow() & 0x80000000;
|
||||||
|
} break;
|
||||||
|
|
||||||
case Operation::CMPl: {
|
case Operation::CMPl: {
|
||||||
const auto source = uint64_t(active_program_->source->full);
|
const auto source = uint64_t(active_program_->source->full);
|
||||||
const auto destination = uint64_t(active_program_->destination->full);
|
const auto destination = uint64_t(active_program_->destination->full);
|
||||||
|
@ -648,7 +648,7 @@ struct ProcessorStorageConstructor {
|
|||||||
{0xf1c0, 0xb040, Operation::CMPw, Decoder::CMP}, // 4-75 (p179)
|
{0xf1c0, 0xb040, Operation::CMPw, Decoder::CMP}, // 4-75 (p179)
|
||||||
{0xf1c0, 0xb080, Operation::CMPl, Decoder::CMP}, // 4-75 (p179)
|
{0xf1c0, 0xb080, Operation::CMPl, Decoder::CMP}, // 4-75 (p179)
|
||||||
|
|
||||||
{0xf1c0, 0xb0c0, Operation::CMPw, Decoder::CMPA}, // 4-77 (p181)
|
{0xf1c0, 0xb0c0, Operation::CMPAw, Decoder::CMPA}, // 4-77 (p181)
|
||||||
{0xf1c0, 0xb1c0, Operation::CMPl, Decoder::CMPA}, // 4-77 (p181)
|
{0xf1c0, 0xb1c0, Operation::CMPl, Decoder::CMPA}, // 4-77 (p181)
|
||||||
|
|
||||||
{0xffc0, 0x0c00, Operation::CMPb, Decoder::CMPI}, // 4-79 (p183)
|
{0xffc0, 0x0c00, Operation::CMPb, Decoder::CMPI}, // 4-79 (p183)
|
||||||
|
@ -104,6 +104,7 @@ class ProcessorStorage {
|
|||||||
BTSTb, BTSTl,
|
BTSTb, BTSTl,
|
||||||
BCLRl, BCLRb,
|
BCLRl, BCLRb,
|
||||||
CMPb, CMPw, CMPl,
|
CMPb, CMPw, CMPl,
|
||||||
|
CMPAw,
|
||||||
TSTb, TSTw, TSTl,
|
TSTb, TSTw, TSTl,
|
||||||
|
|
||||||
JMP, RTS,
|
JMP, RTS,
|
||||||
|
Loading…
x
Reference in New Issue
Block a user