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mirror of https://github.com/TomHarte/CLK.git synced 2025-02-16 18:30:32 +00:00

Convert check_schedule and bus_access macros.

This commit is contained in:
Thomas Harte 2024-01-16 22:28:15 -05:00
parent 30bf187119
commit dc53d6e6fa

View File

@ -12,34 +12,38 @@
6502.hpp, but it's implementation stuff. 6502.hpp, but it's implementation stuff.
*/ */
template <Personality personality, typename T, bool uses_ready_line> void Processor<personality, T, uses_ready_line>::run_for(const Cycles cycles) { template <Personality personality, typename T, bool uses_ready_line>
#define checkSchedule() \ void Processor<personality, T, uses_ready_line>::run_for(const Cycles cycles) {
if(!scheduled_program_counter_) {\
if(interrupt_requests_) {\
if(interrupt_requests_ & (InterruptRequestFlags::Reset | InterruptRequestFlags::PowerOn)) {\
interrupt_requests_ &= ~InterruptRequestFlags::PowerOn;\
scheduled_program_counter_ = operations_[size_t(OperationsSlot::Reset)];\
} else if(interrupt_requests_ & InterruptRequestFlags::NMI) {\
interrupt_requests_ &= ~InterruptRequestFlags::NMI;\
scheduled_program_counter_ = operations_[size_t(OperationsSlot::NMI)];\
} else if(interrupt_requests_ & InterruptRequestFlags::IRQ) {\
scheduled_program_counter_ = operations_[size_t(OperationsSlot::IRQ)];\
} \
} else {\
scheduled_program_counter_ = operations_[size_t(OperationsSlot::FetchDecodeExecute)];\
}\
}
#define bus_access() \ const auto check_schedule = [&] {
interrupt_requests_ = (interrupt_requests_ & ~InterruptRequestFlags::IRQ) | irq_request_history_; \ if(!scheduled_program_counter_) {
irq_request_history_ = irq_line_ & flags_.inverse_interrupt; \ if(interrupt_requests_) {
number_of_cycles -= bus_handler_.perform_bus_operation(next_bus_operation_, bus_address_, bus_value_); \ if(interrupt_requests_ & (InterruptRequestFlags::Reset | InterruptRequestFlags::PowerOn)) {
next_bus_operation_ = BusOperation::None; \ interrupt_requests_ &= ~InterruptRequestFlags::PowerOn;
if(number_of_cycles <= Cycles(0)) break; scheduled_program_counter_ = operations_[size_t(OperationsSlot::Reset)];
} else if(interrupt_requests_ & InterruptRequestFlags::NMI) {
interrupt_requests_ &= ~InterruptRequestFlags::NMI;
scheduled_program_counter_ = operations_[size_t(OperationsSlot::NMI)];
} else if(interrupt_requests_ & InterruptRequestFlags::IRQ) {
scheduled_program_counter_ = operations_[size_t(OperationsSlot::IRQ)];
}
} else {
scheduled_program_counter_ = operations_[size_t(OperationsSlot::FetchDecodeExecute)];
}
}
};
checkSchedule(); check_schedule();
Cycles number_of_cycles = cycles + cycles_left_to_run_; Cycles number_of_cycles = cycles + cycles_left_to_run_;
const auto bus_access = [&]() -> bool {
interrupt_requests_ = (interrupt_requests_ & ~InterruptRequestFlags::IRQ) | irq_request_history_;
irq_request_history_ = irq_line_ & flags_.inverse_interrupt;
number_of_cycles -= bus_handler_.perform_bus_operation(next_bus_operation_, bus_address_, bus_value_);
next_bus_operation_ = BusOperation::None;
return number_of_cycles <= Cycles(0);
};
while(number_of_cycles > Cycles(0)) { while(number_of_cycles > Cycles(0)) {
// Deal with a potential RDY state, if this 6502 has anything connected to ready. // Deal with a potential RDY state, if this 6502 has anything connected to ready.
@ -52,7 +56,7 @@ template <Personality personality, typename T, bool uses_ready_line> void Proces
number_of_cycles -= bus_handler_.perform_bus_operation(BusOperation::Ready, bus_address_, bus_value_); number_of_cycles -= bus_handler_.perform_bus_operation(BusOperation::Ready, bus_address_, bus_value_);
if(interrupt_requests_ & InterruptRequestFlags::Reset) { if(interrupt_requests_ & InterruptRequestFlags::Reset) {
stop_is_active_ = false; stop_is_active_ = false;
checkSchedule(); check_schedule();
break; break;
} }
} }
@ -63,14 +67,14 @@ template <Personality personality, typename T, bool uses_ready_line> void Proces
interrupt_requests_ |= (irq_line_ & flags_.inverse_interrupt); interrupt_requests_ |= (irq_line_ & flags_.inverse_interrupt);
if(interrupt_requests_ & InterruptRequestFlags::NMI || irq_line_) { if(interrupt_requests_ & InterruptRequestFlags::NMI || irq_line_) {
wait_is_active_ = false; wait_is_active_ = false;
checkSchedule(); check_schedule();
break; break;
} }
} }
if((!uses_ready_line || !ready_is_active_) && (!has_stpwai(personality) || (!wait_is_active_ && !stop_is_active_))) { if((!uses_ready_line || !ready_is_active_) && (!has_stpwai(personality) || (!wait_is_active_ && !stop_is_active_))) {
if(next_bus_operation_ != BusOperation::None) { if(next_bus_operation_ != BusOperation::None) {
bus_access(); if(bus_access()) break;
} }
while(1) { while(1) {
@ -117,7 +121,7 @@ template <Personality personality, typename T, bool uses_ready_line> void Proces
case OperationMoveToNextProgram: case OperationMoveToNextProgram:
scheduled_program_counter_ = nullptr; scheduled_program_counter_ = nullptr;
checkSchedule(); check_schedule();
continue; continue;
#define push(v) {\ #define push(v) {\
@ -749,7 +753,7 @@ template <Personality personality, typename T, bool uses_ready_line> void Proces
ready_is_active_ = true; ready_is_active_ = true;
break; break;
} }
bus_access(); if(bus_access()) break;
} }
} }
} }