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Adds input line capture.
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f7a16762b4
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@ -11,6 +11,7 @@
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using namespace CPU::MC68000;
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State::State(const ProcessorBase &src): State() {
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// Registers.
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for(int c = 0; c < 7; ++c) {
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registers.address[c] = src.address_[c].full;
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registers.data[c] = src.data_[c].full;
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@ -21,6 +22,15 @@ State::State(const ProcessorBase &src): State() {
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registers.status = src.get_status();
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registers.program_counter = src.program_counter_.full;
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registers.prefetch = src.prefetch_queue_.full;
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// Inputs.
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inputs.bus_interrupt_level = uint8_t(src.bus_interrupt_level_);
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inputs.dtack = src.dtack_;
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inputs.is_peripheral_address = src.is_peripheral_address_;
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inputs.bus_error = src.bus_error_;
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inputs.bus_request = src.bus_request_;
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inputs.bus_grant = false; // TODO (within the 68000).
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inputs.halt = src.halt_;
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}
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void State::apply(ProcessorBase &target) {
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@ -47,12 +57,19 @@ State::Registers::Registers() {
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}
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}
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State::Inputs::Inputs() {
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if(needs_declare()) {
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DeclareField(bus_interrupt_level);
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DeclareField(dtack);
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DeclareField(is_peripheral_address);
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DeclareField(bus_error);
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DeclareField(bus_request);
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DeclareField(bus_grant);
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DeclareField(halt);
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}
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}
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State::ExecutionState::ExecutionState() {
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if(needs_declare()) {
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}
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}
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State::Inputs::Inputs() {
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if(needs_declare()) {
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}
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}
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@ -43,6 +43,14 @@ struct State: public Reflection::StructImpl<State> {
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related to an access cycle.
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*/
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struct Inputs: public Reflection::StructImpl<Inputs> {
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uint8_t bus_interrupt_level;
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bool dtack;
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bool is_peripheral_address;
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bool bus_error;
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bool bus_request;
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bool bus_grant;
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bool halt;
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Inputs();
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} inputs;
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