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Improves M50470 entry-point detection, adds test output.
This commit is contained in:
Thomas Harte
parent
56111c75ae
commit
dcc2fe0990
@ -31,7 +31,6 @@ template <
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> class Disassembler {
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public:
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using ProgramCounterType = typename MinIntTypeValue<max_address>::type;
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static_assert(!std::is_same_v<ProgramCounterType, void>);
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/*!
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Adds the result of disassembling @c memory which is @c length @c MemoryWords long from @c start_address
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@ -48,10 +47,20 @@ template <
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const auto next_entry_point = pending_entry_points_.front();
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pending_entry_points_.pop_front();
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parser.parse(*this, memory - location, next_entry_point, length + location);
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if(next_entry_point >= location) {
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parser.parse(*this, memory - location, next_entry_point % max_address, length + location);
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}
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}
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}
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const std::map<ProgramCounterType, InstructionType> &instructions() const {
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return instructions_;
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}
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const std::set<ProgramCounterType> &entry_points() const {
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return entry_points_;
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}
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void announce_overflow(ProgramCounterType) {}
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void announce_instruction(ProgramCounterType address, InstructionType instruction) {
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instructions_[address] = instruction;
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@ -169,31 +169,37 @@ inline constexpr const char *addressing_mode_name(AddressingMode addressing_mode
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would appear in an assembler. E.g. '$5a' for that zero page address, or '$5a, x' for zero-page indexed from $5a. This function
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may access up to three bytes from @c operation onwards.
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*/
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inline std::string address(AddressingMode addressing_mode, const uint8_t *operation) {
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inline std::string address(AddressingMode addressing_mode, const uint8_t *operation, uint16_t program_counter) {
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std::stringstream output;
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output << std::hex << std::setfill('0') << std::setw(2);
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output << std::hex;
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#define NUM(x) std::setfill('0') << std::setw(2) << int(x)
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#define NUM4(x) std::setfill('0') << std::setw(4) << int(x)
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switch(addressing_mode) {
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default: return "???";
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case AddressingMode::Implied: return "";
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case AddressingMode::Accumulator: return "A";
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case AddressingMode::Immediate: output << "#$" << int(operation[1]); break;
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case AddressingMode::Absolute: output << "$" << int(operation[2]) << int(operation[1]); break;
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case AddressingMode::AbsoluteX: output << "$" << int(operation[2]) << int(operation[1]) << ", x"; break;
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case AddressingMode::AbsoluteY: output << "$" << int(operation[2]) << int(operation[1]) << ", y"; break;
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case AddressingMode::ZeroPage: output << "$" << int(operation[1]); break;
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case AddressingMode::ZeroPageX: output << "$" << int(operation[1]) << ", x"; break;
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case AddressingMode::ZeroPageY: output << "$" << int(operation[1]) << ", y"; break;
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case AddressingMode::XIndirect: output << "(($" << int(operation[1]) << ", x))"; break;
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case AddressingMode::IndirectY: output << "(($" << int(operation[1]) << "), y)"; break;
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case AddressingMode::Relative: output << "+#$" << int(int8_t(operation[1])); break;
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case AddressingMode::AbsoluteIndirect: output << "($" << int(operation[2]) << int(operation[1]) << ")"; break;
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case AddressingMode::ZeroPageIndirect: output << "($" << int(operation[1]) << ")"; break;
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case AddressingMode::SpecialPage: output << "$1f" << int(operation[1]); break;
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case AddressingMode::ImmediateZeroPage: output << "#$" << int(operation[1]) << ", $" << int(int8_t(operation[2])); break;
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case AddressingMode::AccumulatorRelative: output << "A, +#$" << int(int8_t(operation[1])); break;
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case AddressingMode::ZeroPageRelative: output << "$" << int(operation[1]) << ", +#$" << int(int8_t(operation[2])); break;
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case AddressingMode::Accumulator: return "A ";
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case AddressingMode::Immediate: output << "#$" << NUM(operation[1]); break;
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case AddressingMode::Absolute: output << "$" << NUM(operation[2]) << NUM(operation[1]); break;
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case AddressingMode::AbsoluteX: output << "$" << NUM(operation[2]) << NUM(operation[1]) << ", x"; break;
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case AddressingMode::AbsoluteY: output << "$" << NUM(operation[2]) << NUM(operation[1]) << ", y"; break;
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case AddressingMode::ZeroPage: output << "$" << NUM(operation[1]); break;
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case AddressingMode::ZeroPageX: output << "$" << NUM(operation[1]) << ", x"; break;
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case AddressingMode::ZeroPageY: output << "$" << NUM(operation[1]) << ", y"; break;
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case AddressingMode::XIndirect: output << "(($" << NUM(operation[1]) << ", x))"; break;
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case AddressingMode::IndirectY: output << "(($" << NUM(operation[1]) << "), y)"; break;
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case AddressingMode::Relative: output << "#$" << NUM4(2 + program_counter + int8_t(operation[1])); break;
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case AddressingMode::AbsoluteIndirect: output << "($" << NUM(operation[2]) << NUM(operation[1]) << ") "; break;
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case AddressingMode::ZeroPageIndirect: output << "($" << NUM(operation[1]) << ")"; break;
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case AddressingMode::SpecialPage: output << "$1f" << NUM(operation[1]); break;
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case AddressingMode::ImmediateZeroPage: output << "#$" << NUM(operation[1]) << ", $" << NUM(operation[2]); break;
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case AddressingMode::AccumulatorRelative: output << "A, $" << NUM4(2 + program_counter + int8_t(operation[1])); break;
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case AddressingMode::ZeroPageRelative:
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output << "$" << NUM(operation[1]) << ", $" << NUM4(2 + program_counter + int8_t(operation[2]));
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break;
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}
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#undef NUM4
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#undef NUM
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return output.str();
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}
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@ -48,35 +48,50 @@ template<typename Target, bool include_entries_and_accesses> struct Parser {
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case Operation::RTS: case Operation::RTI: case Operation::BRK:
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return;
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// Terminating operations with implied additional entry point.
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// Terminating operations, possibly with implied additional entry point.
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case Operation::JMP:
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target.add_entry(storage[start + 1] | (storage[start + 2] << 8));
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if(next.second.addressing_mode == AddressingMode::Absolute) {
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target.add_entry(uint16_t(storage[start + 1] | (storage[start + 2] << 8)));
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}
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return;
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case Operation::BRA:
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target.add_entry(start + 2 + int8_t(storage[start + 1]));
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target.add_entry(uint16_t(start + 2 + int8_t(storage[start + 1])));
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return;
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// Instructions that suggest another entry point but don't terminate parsing.
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// case Operation::BBS: case Operation::BBC: // TODO: BBS, BBC
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case Operation::BCC: case Operation::BCS:
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case Operation::BVC: case Operation::BVS:
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case Operation::BMI: case Operation::BPL:
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case Operation::BNE: case Operation::BEQ:
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target.add_entry(start + 2 + int8_t(storage[start + 1]));
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target.add_entry(uint16_t(start + 2 + int8_t(storage[start + 1])));
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break;
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case Operation::JSR:
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target.add_entry(storage[start + 1] | (storage[start + 2] << 8));
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switch(next.second.addressing_mode) {
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default: break;
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case AddressingMode::Absolute:
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target.add_entry(uint16_t(storage[start + 1] | (storage[start + 2] << 8)));
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break;
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case AddressingMode::SpecialPage:
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target.add_entry(uint16_t(storage[start + 1] | 0x1f00));
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break;
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}
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break;
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// // TODO: addressing like the below for the relevant BBC and BBS.
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// case AddressingMode::Bit0AccumulatorRelative:
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// target.add_access(start + 2 + int8_t(storage[start + 1]), access_type(next.second.operation));
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// break;
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case Operation::BBS0: case Operation::BBS1: case Operation::BBS2: case Operation::BBS3:
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case Operation::BBS4: case Operation::BBS5: case Operation::BBS6: case Operation::BBS7:
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case Operation::BBC0: case Operation::BBC1: case Operation::BBC2: case Operation::BBC3:
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case Operation::BBC4: case Operation::BBC5: case Operation::BBC6: case Operation::BBC7:
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switch(next.second.addressing_mode) {
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default: break;
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case AddressingMode::AccumulatorRelative:
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target.add_entry(uint16_t(start + 2 + int8_t(storage[start + 1])));
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break;
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case AddressingMode::ZeroPageRelative:
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target.add_entry(uint16_t(start + 3 + int8_t(storage[start + 2])));
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break;
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}
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break;
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// // TODO: this is a potential addressing mode for JSR.
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// case AddressingMode::SpecialPage:
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// target.add_access(storage[start + 1] | 0x1f00, access_type(next.second.operation));
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// break;
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default: break;
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}
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@ -84,9 +99,9 @@ template<typename Target, bool include_entries_and_accesses> struct Parser {
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// Provide any fixed address accesses.
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switch(next.second.addressing_mode) {
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case AddressingMode::Absolute:
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target.add_access(storage[start + 1] | (storage[start + 2] << 8), access_type(next.second.operation));
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target.add_access(uint16_t(storage[start + 1] | (storage[start + 2] << 8)), access_type(next.second.operation));
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break;
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case AddressingMode::ZeroPage:
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case AddressingMode::ZeroPage: case AddressingMode::ZeroPageRelative:
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target.add_access(storage[start + 1], access_type(next.second.operation));
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break;
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case AddressingMode::ImmediateZeroPage:
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@ -222,8 +222,24 @@ uint8_t GLU::read_microcontroller_address(uint16_t address) {
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void GLU::set_microcontroller_rom(const std::vector<uint8_t> &rom) {
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executor_.set_rom(rom);
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// TEST invocation.
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InstructionSet::Disassembler<InstructionSet::M50740::Parser, 0x1fff, InstructionSet::M50740::Instruction, uint8_t, uint16_t> disassembler;
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disassembler.disassemble(rom.data(), 0x1000, uint16_t(rom.size()), 0x1000);
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const auto instructions = disassembler.instructions();
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const auto entry_points = disassembler.entry_points();
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for(const auto &pair : instructions) {
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std::cout << std::hex << pair.first << "\t\t";
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if(entry_points.find(pair.first) != entry_points.end()) {
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std::cout << "L" << pair.first << "\t";
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} else {
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std::cout << "\t\t";
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}
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std::cout << operation_name(pair.second.operation) << " ";
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std::cout << address(pair.second.addressing_mode, &rom[pair.first - 0x1000], pair.first);
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std::cout << std::endl;
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}
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}
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void GLU::run_for(Cycles cycles) {
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