mirror of
https://github.com/TomHarte/CLK.git
synced 2024-11-22 12:33:29 +00:00
Added a lot of commenting to the CPU6502 definition, simplifying its construction. Added missing nullability modifier to CSElectron. Fixed bad-habit Objective-C style naming on the Electron's Interrupt enum.
This commit is contained in:
Thomas Harte
parent
4c16d34063
commit
de7218cdf0
@ -26,7 +26,6 @@ Machine::Machine() :
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{
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_crt = new Outputs::CRT(228, 262, 1, 2);
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memset(_collisions, 0xff, sizeof(_collisions));
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setup6502();
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set_reset_line(true);
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}
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@ -34,7 +34,6 @@ Machine::Machine() :
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memset(_roms[c], 0xff, 16384);
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_speaker.set_input_rate(125000);
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setup6502();
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}
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Machine::~Machine()
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@ -104,7 +103,7 @@ unsigned int Machine::perform_bus_operation(CPU6502::BusOperation operation, uin
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if(isReadOperation(operation))
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{
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*value = (uint8_t)(_tape.dataRegister >> 2);
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_interruptStatus &= ~InterruptTransmitDataEmpty;
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_interruptStatus &= ~Interrupt::TransmitDataEmpty;
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evaluate_interrupts();
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}
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else
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@ -118,9 +117,9 @@ unsigned int Machine::perform_bus_operation(CPU6502::BusOperation operation, uin
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const uint8_t interruptDisable = (*value)&0xf0;
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if( interruptDisable )
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{
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if( interruptDisable&0x10 ) _interruptStatus &= ~InterruptDisplayEnd;
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if( interruptDisable&0x20 ) _interruptStatus &= ~InterruptRealTimeClock;
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if( interruptDisable&0x40 ) _interruptStatus &= ~InterruptHighToneDetect;
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if( interruptDisable&0x10 ) _interruptStatus &= ~Interrupt::DisplayEnd;
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if( interruptDisable&0x20 ) _interruptStatus &= ~Interrupt::RealTimeClock;
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if( interruptDisable&0x40 ) _interruptStatus &= ~Interrupt::HighToneDetect;
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evaluate_interrupts();
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// TODO: NMI (?)
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}
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@ -265,12 +264,12 @@ unsigned int Machine::perform_bus_operation(CPU6502::BusOperation operation, uin
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case 128*128:
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update_audio();
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signal_interrupt(InterruptRealTimeClock);
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signal_interrupt(Interrupt::RealTimeClock);
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break;
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case 284*128:
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update_audio();
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signal_interrupt(InterruptDisplayEnd);
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signal_interrupt(Interrupt::DisplayEnd);
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break;
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case cycles_per_frame:
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@ -347,21 +346,21 @@ inline void Machine::push_tape_bit(uint16_t bit)
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if(_tape.bits_since_start == 7)
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{
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_interruptStatus &= ~InterruptTransmitDataEmpty;
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_interruptStatus &= ~Interrupt::TransmitDataEmpty;
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}
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}
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else
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{
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if((_tape.dataRegister&0x3) == 0x1)
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{
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_interruptStatus |= InterruptTransmitDataEmpty;
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_interruptStatus |= Interrupt::TransmitDataEmpty;
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_tape.bits_since_start = 9;
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}
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if(_tape.dataRegister == 0x3ff)
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_interruptStatus |= InterruptHighToneDetect;
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_interruptStatus |= Interrupt::HighToneDetect;
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else
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_interruptStatus &= ~InterruptHighToneDetect;
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_interruptStatus &= ~Interrupt::HighToneDetect;
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}
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// printf(".");
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@ -14,7 +14,6 @@
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#include "../../Outputs/Speaker.hpp"
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#include "../../Storage/Tape/Tape.hpp"
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#include <stdint.h>
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#include "Atari2600Inputs.h"
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namespace Electron {
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@ -32,11 +31,11 @@ enum ROMSlot: uint8_t {
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};
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enum Interrupt: uint8_t {
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InterruptDisplayEnd = 0x04,
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InterruptRealTimeClock = 0x08,
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InterruptTransmitDataEmpty = 0x10,
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InterruptReceiveDataFull = 0x20,
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InterruptHighToneDetect = 0x40
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DisplayEnd = 0x04,
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RealTimeClock = 0x08,
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TransmitDataEmpty = 0x10,
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ReceiveDataFull = 0x20,
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HighToneDetect = 0x40
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};
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enum Key: uint16_t {
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@ -58,6 +57,12 @@ enum Key: uint16_t {
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KeyBreak = 0xffff
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};
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/*!
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@abstract Represents an Acorn Electron.
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@discussion An instance of Electron::Machine represents the current state of an
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Acorn Electron.
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*/
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class Machine: public CPU6502::Processor<Machine> {
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public:
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@ -14,7 +14,7 @@
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- (void)setOSROM:(nonnull NSData *)rom;
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- (void)setBASICROM:(nonnull NSData *)rom;
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- (void)setROM:(nonnull NSData *)rom slot:(int)slot;
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- (BOOL)openUEFAtURL:(NSURL *)URL;
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- (BOOL)openUEFAtURL:(nonnull NSURL *)URL;
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- (void)setKey:(uint16_t)key isPressed:(BOOL)isPressed;
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@ -25,7 +25,6 @@ enum Register {
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S
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};
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enum Flag {
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Sign = 0x80,
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Overflow = 0x40,
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@ -41,10 +40,24 @@ enum BusOperation {
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Read, ReadOpcode, Write, Ready, None
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};
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/*!
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Evaluates to `true` if the operation is a read; `false` if it is a write.
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*/
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#define isReadOperation(v) (v == CPU6502::BusOperation::Read || v == CPU6502::BusOperation::ReadOpcode)
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/*!
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An opcode that is guaranteed to cause the CPU to jam.
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*/
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extern const uint8_t JamOpcode;
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/*!
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@abstact An abstract base class for emulation of a 6502 processor.
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@discussion Subclasses should implement @c perform_bus_operation(BusOperation operation, uint16_t address, uint8_t *value) in
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order to provde the bus on which the 6502 operates. Additional functionality can be provided by the host machine by providing
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a jam handler and inserting jam opcodes where appropriate; that will cause call outs when the program counter reaches those
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addresses. @c return_from_subroutine can be used to exit from a jammed state.
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*/
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template <class T> class Processor {
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public:
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@ -384,18 +397,6 @@ template <class T> class Processor {
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bool _nmi_line_is_enabled;
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bool _ready_is_active;
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public:
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Processor() :
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_scheduleProgramsReadPointer(0),
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_scheduleProgramsWritePointer(0),
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_is_jammed(false),
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_jam_handler(nullptr),
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_cycles_left_to_run(0),
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_ready_line_is_enabled(false),
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_ready_is_active(false),
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_scheduledPrograms{nullptr, nullptr, nullptr, nullptr}
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{}
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const MicroOp *get_reset_program() {
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static const MicroOp reset[] = {
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CycleFetchOperand,
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@ -423,6 +424,41 @@ template <class T> class Processor {
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return reset;
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}
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public:
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Processor() :
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_scheduleProgramsReadPointer(0),
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_scheduleProgramsWritePointer(0),
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_is_jammed(false),
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_jam_handler(nullptr),
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_cycles_left_to_run(0),
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_ready_line_is_enabled(false),
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_ready_is_active(false),
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_scheduledPrograms{nullptr, nullptr, nullptr, nullptr},
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_interruptFlag(Flag::Interrupt),
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_s(0),
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_nextBusOperation(BusOperation::None)
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{
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// only the interrupt flag is defined upon reset but get_flags isn't going to
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// mask the other flags so we need to do that, at least
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_carryFlag &= Flag::Carry;
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_decimalFlag &= Flag::Decimal;
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_overflowFlag &= Flag::Overflow;
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// TODO: is this accurate? It feels more likely that a CPU would need to wait
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// on an explicit reset command, since the relative startup times of different
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// components from power on would be a bit unpredictable.
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schedule_program(get_reset_program());
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}
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/*!
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Runs the 6502 for a supplied number of cycles.
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@discussion Subclasses must implement @c perform_bus_operation(BusOperation operation, uint16_t address, uint8_t *value) .
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The 6502 will call that method for all bus accesses. The 6502 is guaranteed to perform one bus operation call per cycle.
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@param number_of_cycles The number of cycles to run the 6502 for.
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*/
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void run_for_cycles(int number_of_cycles)
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{
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static const MicroOp doBranch[] = {
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@ -932,6 +968,14 @@ template <class T> class Processor {
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}
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}
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/*!
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Gets the value of a register.
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@see set_value_of_register
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@param r The register to set.
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@returns The value of the register. 8-bit registers will be returned as unsigned.
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*/
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uint16_t get_value_of_register(Register r)
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{
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switch (r) {
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@ -947,6 +991,14 @@ template <class T> class Processor {
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}
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}
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/*!
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Sets the value of a register.
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@see get_value_of_register
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@param r The register to set.
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@param value The value to set. If the register is only 8 bit, the value will be truncated.
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*/
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void set_value_of_register(Register r, uint16_t value)
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{
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switch (r) {
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@ -961,23 +1013,10 @@ template <class T> class Processor {
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}
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}
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void setup6502()
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{
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// only the interrupt flag is defined upon reset but get_flags isn't going to
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// mask the other flags so we need to do that, at least
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_interruptFlag = Flag::Interrupt;
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_carryFlag &= Flag::Carry;
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_decimalFlag &= Flag::Decimal;
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_overflowFlag &= Flag::Overflow;
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_s = 0;
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_nextBusOperation = BusOperation::None;
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// TODO: is this accurate? It feels more likely that a CPU would need to wait
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// on an explicit reset command, since the relative startup times of different
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// components from power on would be a bit unpredictable.
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schedule_program(get_reset_program());
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}
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/*!
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Interrupts current execution flow to perform an RTS and, if the 6502 is currently jammed,
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to unjam it.
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*/
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void return_from_subroutine()
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{
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_s++;
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@ -990,6 +1029,11 @@ template <class T> class Processor {
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}
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}
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/*!
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Sets the current level of the RDY line.
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@param active @c true if the line is logically active; @c false otherwise.
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*/
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void set_ready_line(bool active)
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{
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if(active)
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@ -1001,26 +1045,54 @@ template <class T> class Processor {
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}
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}
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/*!
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Sets the current level of the RST line.
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@param active @c true if the line is logically active; @c false otherwise.
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*/
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void set_reset_line(bool active)
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{
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_reset_line_is_enabled = active;
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}
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/*!
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Sets the current level of the IRQ line.
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@param active @c true if the line is logically active; @c false otherwise.
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*/
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void set_irq_line(bool active)
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{
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_irq_line_is_enabled = active;
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}
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/*!
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Sets the current level of the NMI line.
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@param active `true` if the line is logically active; `false` otherwise.
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*/
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void set_nmi_line(bool active)
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{
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// TODO: NMI is edge triggered, not level, and in any case _nmi_line_is_enabled
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// is not honoured elsewhere. So NMI is yet to be implemented.
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_nmi_line_is_enabled = active;
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}
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/*!
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Queries whether the 6502 is now 'jammed'; i.e. has entered an invalid state
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such that it will not of itself perform any more meaningful processing.
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@returns @c true if the 6502 is jammed; @c false otherwise.
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*/
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bool is_jammed()
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{
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return _is_jammed;
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}
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/*!
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Installs a jam handler. Jam handlers are notified if a running 6502 jams.
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@param handler The class instance that will be this 6502's jam handler from now on.
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*/
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void set_jam_handler(JamHandler *handler)
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{
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_jam_handler = handler;
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