6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-22 12:33:29 +00:00
Code Issues Projects Releases Wiki Activity

Merge pull request #1402 from TomHarte/CPCInterruptTiming

Browse Source 
Pull CPC interrupt to start of hsync.
This commit is contained in:
Thomas Harte 2024-09-12 21:12:02 -04:00 committed by GitHub
commit dfcdbe5b6a
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Machines/AmstradCPC/AmstradCPC.cpp
View File

@ -305,12 +305,12 @@ class CRTCBusHandler {
// Per Interrupts in the CPC: "to be confirmed: does gate array count positive or negative edge transitions of HSYNC signal?"; // Per Interrupts in the CPC: "to be confirmed: does gate array count positive or negative edge transitions of HSYNC signal?";
// if you take it as given that display mode is latched as a result of hsync then Pipe Mania seems to imply that the count // if you take it as given that display mode is latched as a result of hsync then Pipe Mania seems to imply that the count
// occurs on a leading edge and the mode lock on a trailing. // occurs on a leading edge and the mode lock on a trailing.
if(was_hsync_ && !state.hsync) { if(!was_hsync_ && state.hsync) {
interrupt_timer_.signal_hsync(); interrupt_timer_.signal_hsync();
} }
// Check for a trailing CRTC hsync; if one occurred then that's the trigger potentially to change modes. // Check for a trailing CRTC hsync; if one occurred then that's the trigger potentially to change modes.
if(!was_hsync_ && state.hsync) { if(was_hsync_ && !state.hsync) {
if(mode_ != next_mode_) { if(mode_ != next_mode_) {
mode_ = next_mode_; mode_ = next_mode_;
switch(mode_) { switch(mode_) {