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Merge pull request #1402 from TomHarte/CPCInterruptTiming

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Pull CPC interrupt to start of hsync.
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Thomas Harte 2024-09-12 21:12:02 -04:00 committed by GitHub
commit dfcdbe5b6a
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1 changed files with 2 additions and 2 deletions
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Machines/AmstradCPC/AmstradCPC.cpp
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@ -305,12 +305,12 @@ class CRTCBusHandler {
// Per Interrupts in the CPC: "to be confirmed: does gate array count positive or negative edge transitions of HSYNC signal?";
// if you take it as given that display mode is latched as a result of hsync then Pipe Mania seems to imply that the count
// occurs on a leading edge and the mode lock on a trailing.
if(was_hsync_ && !state.hsync) {
if(!was_hsync_ && state.hsync) {
interrupt_timer_.signal_hsync();
}
// Check for a trailing CRTC hsync; if one occurred then that's the trigger potentially to change modes.
if(!was_hsync_ && state.hsync) {
if(was_hsync_ && !state.hsync) {
if(mode_ != next_mode_) {
mode_ = next_mode_;
switch(mode_) {