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Testing against the ColecoVision suggests this is probably always 7.

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Thomas Harte 2018-10-26 20:59:12 -04:00
parent 1fc9356796
commit e02aa885d8
1 changed files with 7 additions and 4 deletions
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11
Components/9918/Implementation/9918Base.hpp
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@ -94,10 +94,13 @@ class Base {
int cycles_until_access_ = 0;
int minimum_access_column_ = 0;
int vram_access_delay() {
// The Sega VDP seems to allow slightly quicker access;
// Sega types generally claim 26 Z80 cycles are sufficient.
// The received wisdom in MSX land is that it's 27.
return is_sega_vdp(personality_) ? 7 : 8;
// This seems to be correct for all currently-modelled VDPs;
// it's the delay between an external device scheduling a
// read or write and the very first time that can occur
// (though, in practice, it won't happen until the next
// external slot after this number of cycles after the
// device has requested the read or write).
return 7;
}
// Holds the main status register.