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https://github.com/TomHarte/CLK.git
synced 2024-12-25 03:32:01 +00:00
Restored proper video output.
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7eeac3b586
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@ -61,7 +61,6 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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return wait_cycles;
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}
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uint16_t refresh = 0;
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uint16_t address = cycle.address ? *cycle.address : 0;
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bool is_opcode_read = false;
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switch(cycle.operation) {
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@ -96,21 +95,28 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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break;
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case CPU::Z80::PartialMachineCycle::Refresh:
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// The ZX80 and 81 signal an interrupt while refresh is active and bit 6 of the refresh
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// address is low. The Z80 signals a refresh, providing the refresh address during the
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// final two cycles of an opcode fetch. Therefore communicate a transient signalling
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// of the IRQ line if necessary.
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if(!(address & 0x40)) {
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set_interrupt_line(true, -2);
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set_interrupt_line(false);
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}
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if(latched_video_byte_) {
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size_t char_address = (size_t)((address & 0xff00) | ((latched_video_byte_ & 0x3f) << 3) | line_counter_);
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if(char_address < ram_base_) {
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uint8_t mask = (latched_video_byte_ & 0x80) ? 0x00 : 0xff;
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latched_video_byte_ = rom_[char_address & rom_mask_] ^ mask;
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}
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video_->output_byte(latched_video_byte_);
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latched_video_byte_ = 0;
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}
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break;
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case CPU::Z80::PartialMachineCycle::ReadOpcodeStart:
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case CPU::Z80::PartialMachineCycle::ReadOpcodeWait:
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// printf("%04x ", address);
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// The ZX80 and 81 signal an interrupt while refresh is active and bit 6 of the refresh
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// address is low. The Z80 signals a refresh, providing the refresh address during the
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// final two cycles of an opcode fetch. Therefore communicate a transient signalling
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// of the IRQ line if necessary.
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// refresh = get_value_of_register(CPU::Z80::Register::Refresh);
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// Check for use of the fast tape hack.
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if(address == tape_trap_address_) { // TODO: && fast_tape_hack_enabled_
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int next_byte = parser_.get_next_byte(tape_player_.get_tape());
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@ -134,13 +140,7 @@ int Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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// currently active, perform a video output and return a NOP. Otherwise,
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// just return the value as read.
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if(is_opcode_read && address&0x8000 && !(value & 0x40) && !get_halt_line()) {
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size_t char_address = (size_t)((refresh & 0xff00) | ((value & 0x3f) << 3) | line_counter_);
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if(char_address < ram_base_) {
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uint8_t mask = (value & 0x80) ? 0x00 : 0xff;
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value = rom_[char_address & rom_mask_] ^ mask;
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}
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video_->output_byte(value);
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latched_video_byte_ = value;
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*cycle.value = 0;
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} else *cycle.value = value;
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}
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@ -89,6 +89,7 @@ class Machine:
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bool is_zx81_;
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bool nmi_is_enabled_;
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int vsync_start_cycle_, vsync_end_cycle_;
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uint8_t latched_video_byte_;
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};
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}
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