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Adds missing addressing modes for ADDA and SUBA.

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... reducing missing opcodes to 1941.
This commit is contained in:
Thomas Harte 2019-04-27 17:22:26 -04:00
parent ab5fcab9bf
commit e2abb66a11
1 changed files with 5 additions and 1 deletions
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6
Processors/68000/Implementation/68000Storage.cpp
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@ -102,7 +102,7 @@ struct ProcessorStorageConstructor {
return int(Action::Decrement2); return int(Action::Decrement2);
} }
#define pseq(x, m) ((((m)&0xff) == 0x06) || (((m)&0xff) == 0x13) ? "n " x : x) #define pseq(x, m) ((((m)&0xff) == d8AnXn) || (((m)&0xff) == d8PCXn) ? "n " x : x)
/*! /*!
Installs BusSteps that implement the described program into the relevant Installs BusSteps that implement the described program into the relevant
@ -1482,6 +1482,8 @@ struct ProcessorStorageConstructor {
case bw(d16An): // ADDA/SUBA.w (d16, An), An case bw(d16An): // ADDA/SUBA.w (d16, An), An
case bw(d8AnXn): // ADDA/SUBA.w (d8, An, Xn), An case bw(d8AnXn): // ADDA/SUBA.w (d8, An, Xn), An
case bw(d16PC): // ADDA/SUBA.w (d16, PC), An
case bw(d8PCXn): // ADDA/SUBA.w (d8, PC, Xn), An
op( calc_action_for_mode(mode) | MicroOp::SourceMask, op( calc_action_for_mode(mode) | MicroOp::SourceMask,
seq(pseq("np nr np nn", mode), { ea(0) })); seq(pseq("np nr np nn", mode), { ea(0) }));
op(Action::PerformOperation); op(Action::PerformOperation);
@ -1489,6 +1491,8 @@ struct ProcessorStorageConstructor {
case l(d16An): // ADDA/SUBA.l (d16, An), An case l(d16An): // ADDA/SUBA.l (d16, An), An
case l(d8AnXn): // ADDA/SUBA.l (d8, An, Xn), An case l(d8AnXn): // ADDA/SUBA.l (d8, An, Xn), An
case l(d16PC): // ADDA/SUBA.l (d16, PC), An
case l(d8PCXn): // ADDA/SUBA.l (d8, PC, Xn), An
op( calc_action_for_mode(mode) | MicroOp::SourceMask, op( calc_action_for_mode(mode) | MicroOp::SourceMask,
seq(pseq("np nR+ nr np n", mode), { ea(0), ea(0) })); seq(pseq("np nR+ nr np n", mode), { ea(0), ea(0) }));
op(Action::PerformOperation); op(Action::PerformOperation);