6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-26 23:52:26 +00:00
Code Issues Projects Releases Wiki Activity

Rephrased internal operation machine cycles as having only an end. So they're now easy to count. Hence the test machine spots them, and a couple more of the current timing subset passes.

Browse Source
This commit is contained in:
Thomas Harte 2017-06-19 07:39:46 -04:00
parent 85c6fb1430
commit e3244eb68e
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Processors/Z80/Z80.hpp
View File

@ -116,7 +116,7 @@ struct MachineCycle {
#define Input(addr, val) BusOp(InputStart(addr, val)), BusOp(InputWait(addr, val, false)), BusOp(InputWait(addr, val, true)), BusOp(InputEnd(addr, val))
#define Output(addr, val) BusOp(OutputStart(addr, val)), BusOp(OutputWait(addr, val, false)), BusOp(OutputWait(addr, val, true)), BusOp(OutputEnd(addr, val))
#define InternalOperation(len) {MicroOp::BusOperation, nullptr, nullptr, {MachineCycle::Internal, MachineCycle::Phase::Start, len}}
#define InternalOperation(len) {MicroOp::BusOperation, nullptr, nullptr, {MachineCycle::Internal, MachineCycle::Phase::End, len}}
/// A sequence is a series of micro-ops that ends in a move-to-next-program operation.
#define Sequence(...) { __VA_ARGS__, {MicroOp::MoveToNextProgram} }