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Assume and test that divide-by-zero posts the PC of the offending instruction.

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This commit is contained in:
Thomas Harte 2021-08-07 17:51:00 -04:00
parent 6a15bb15ca
commit e402e690b0
3 changed files with 20 additions and 3 deletions
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17
OSBindings/Mac/Clock SignalTests/68000ArithmeticTests.mm
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@ -880,14 +880,27 @@
- (void)testDIVSException { - (void)testDIVSException {
// DIVS.W #0, D1 // DIVS.W #0, D1
self.machine->set_initial_stack_pointer(0); const uint32_t initial_sp = 0x5000;
self.machine->set_initial_stack_pointer(initial_sp);
[self performDIVS:0x0 d1:0x1fffffff]; [self performDIVS:0x0 d1:0x1fffffff];
// Check register state.
const auto state = self.machine->get_processor_state(); const auto state = self.machine->get_processor_state();
XCTAssertEqual(state.data[1], 0x1fffffff); XCTAssertEqual(state.data[1], 0x1fffffff);
XCTAssertEqual(state.supervisor_stack_pointer, 0xfffffffa); XCTAssertEqual(state.supervisor_stack_pointer, initial_sp - 6);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend); XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend);
XCTAssertEqual(42, self.machine->get_cycle_count()); XCTAssertEqual(42, self.machine->get_cycle_count());
// Check stack contents; should be PC.l, PC.h and status register.
// Assumed: the program counter on the stack is that of the
// failing instrustion.
const uint16_t pc_h = *self.machine->ram_at(initial_sp-4);
const uint16_t pc_l = *self.machine->ram_at(initial_sp-2);
// const uint16_t status = *self.machine->ram_at(initial_sp);
const uint32_t initial_pc = self.machine->initial_pc();
XCTAssertEqual(pc_l, initial_pc & 0xffff);
XCTAssertEqual(pc_h, initial_pc >> 16);
// XCTAssertEqual(status, 9);
} }
@end @end

4
OSBindings/Mac/Clock SignalTests/TestRunner68000.hpp
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@ -35,6 +35,10 @@ class RAM68000: public CPU::MC68000::BusHandler {
set_processor_state(state); set_processor_state(state);
} }
uint32_t initial_pc() const {
return 0x1000;
}
void set_program(const std::vector<uint16_t> &program) { void set_program(const std::vector<uint16_t> &program) {
memcpy(&ram_[0x1000 >> 1], program.data(), program.size() * sizeof(uint16_t)); memcpy(&ram_[0x1000 >> 1], program.data(), program.size() * sizeof(uint16_t));

2
Processors/68000/Implementation/68000Implementation.hpp
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@ -1000,7 +1000,7 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
populate_trap_steps(5, status()); \ populate_trap_steps(5, status()); \
bus_program->microcycle.length = HalfCycles(20); \ bus_program->microcycle.length = HalfCycles(20); \
\ \
program_counter_.full -= 2; program_counter_.full -= 6;
case Operation::DIVU: { case Operation::DIVU: {
carry_flag_ = 0; carry_flag_ = 0;