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https://github.com/TomHarte/CLK.git
synced 2025-01-11 08:30:55 +00:00
Logs a bit more from the Blitter, gives it access to slots.
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dda154c7c6
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@ -28,16 +28,15 @@ void Blitter::set_last_word_mask(uint16_t value) {
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LOG("Set last word mask: " << PADHEX(4) << value);
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}
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void Blitter::set_pointer(int channel, int shift, uint16_t value) {
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LOG("Set pointer " << channel << " shift " << shift << " to " << PADHEX(4) << value);
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}
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void Blitter::set_size(uint16_t value) {
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LOG("Set size " << PADHEX(4) << value);
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width_ = (width_ & ~0x3f) | (value & 0x3f);
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height_ = (height_ & ~0x3ff) | (value >> 6);
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LOG("Set size to " << std::dec << width_ << ", " << height_);
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}
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void Blitter::set_minterms(uint16_t value) {
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LOG("Set minterms " << PADHEX(4) << value);
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minterms_ = value & 0xff;
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}
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void Blitter::set_vertical_size(uint16_t value) {
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@ -61,9 +60,6 @@ uint16_t Blitter::get_status() {
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return 0;
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}
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int Blitter::get_remaining_accesses() {
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return 0;
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}
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void Blitter::run_for(int) {
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bool Blitter::advance() {
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return false;
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}
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@ -27,7 +27,11 @@ class Blitter {
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void set_control(int index, uint16_t value);
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void set_first_word_mask(uint16_t value);
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void set_last_word_mask(uint16_t value);
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void set_pointer(int channel, int shift, uint16_t value);
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template <int id, int shift> void set_pointer(uint16_t value) {
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addresses_[id] = (addresses_[id] & (0xffff'0000 >> shift)) | uint32_t(value << shift);
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}
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void set_size(uint16_t value);
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void set_minterms(uint16_t value);
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void set_vertical_size(uint16_t value);
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@ -37,16 +41,15 @@ class Blitter {
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uint16_t get_status();
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/// @returns The number of accesses required to complete the current
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/// operation, if any, or 0 if no operation is pending.
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int get_remaining_accesses();
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/// Performs the next n accesses.
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void run_for(int accesses);
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bool advance();
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private:
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uint16_t *const ram_;
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const size_t ram_size_;
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uint32_t addresses_[4];
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uint8_t minterms_;
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int width_ = 0, height_ = 0;
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};
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}
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@ -225,8 +225,8 @@ template <int cycle, bool stop_if_cpu> bool Chipset::perform_cycle() {
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if constexpr (cycle & 1) {
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// Odd slot priority is:
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//
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// 1. Copper, if interested.
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// 2. Bitplane.
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// 1. Bitplanes.
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// 2. Copper, if interested.
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// 3. Blitter.
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// 4. CPU.
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if((dma_control_ & CopperFlag) == CopperFlag) {
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@ -246,12 +246,16 @@ template <int cycle, bool stop_if_cpu> bool Chipset::perform_cycle() {
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// 4. CPU.
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if constexpr (cycle >= 4 && cycle <= 6) {
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if((dma_control_ & DiskFlag) == DiskFlag) {
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disk_.advance();
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if(disk_.advance()) {
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return false;
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}
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}
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}
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}
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return true;
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// Down here: give first refusal to the Blitter, otherwise
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// pass on to the CPU.
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return !blitter_.advance();
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}
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template <bool stop_on_cpu> int Chipset::advance_slots(int first_slot, int last_slot) {
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@ -547,14 +551,14 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
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case Write(0x044): blitter_.set_first_word_mask(cycle.value16()); break;
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case Write(0x046): blitter_.set_last_word_mask(cycle.value16()); break;
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case Write(0x048): blitter_.set_pointer(2, 16, cycle.value16()); break;
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case Write(0x04a): blitter_.set_pointer(2, 0, cycle.value16()); break;
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case Write(0x04c): blitter_.set_pointer(1, 16, cycle.value16()); break;
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case Write(0x04e): blitter_.set_pointer(1, 0, cycle.value16()); break;
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case Write(0x050): blitter_.set_pointer(0, 16, cycle.value16()); break;
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case Write(0x052): blitter_.set_pointer(0, 0, cycle.value16()); break;
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case Write(0x054): blitter_.set_pointer(3, 16, cycle.value16()); break;
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case Write(0x056): blitter_.set_pointer(3, 0, cycle.value16()); break;
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case Write(0x048): blitter_.set_pointer<2, 16>(cycle.value16()); break;
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case Write(0x04a): blitter_.set_pointer<2, 0>(cycle.value16()); break;
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case Write(0x04c): blitter_.set_pointer<1, 16>(cycle.value16()); break;
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case Write(0x04e): blitter_.set_pointer<1, 0>(cycle.value16()); break;
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case Write(0x050): blitter_.set_pointer<0, 16>(cycle.value16()); break;
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case Write(0x052): blitter_.set_pointer<0, 0>(cycle.value16()); break;
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case Write(0x054): blitter_.set_pointer<3, 16>(cycle.value16()); break;
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case Write(0x056): blitter_.set_pointer<3, 0>(cycle.value16()); break;
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case Write(0x058): blitter_.set_size(cycle.value16()); break;
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case Write(0x05a): blitter_.set_minterms(cycle.value16()); break;
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@ -680,8 +684,8 @@ void Chipset::Sprite::set_image_data(int slot, uint16_t value) {
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// MARK: - Disk.
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void Chipset::DiskDMA::advance() {
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if(!dma_enable_) return;
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bool Chipset::DiskDMA::advance() {
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if(!dma_enable_) return false;
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if(!write_) {
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// TODO: run an actual PLL, collect actual disk data.
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@ -693,8 +697,12 @@ void Chipset::DiskDMA::advance() {
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if(!length_) {
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chipset_.posit_interrupt(InterruptFlag::DiskBlock);
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}
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return true;
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}
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}
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return false;
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}
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// MARK: - CRT connection.
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@ -225,7 +225,7 @@ class Chipset {
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}
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}
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void advance();
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bool advance();
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private:
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uint32_t address_;
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