6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-01-13 22:32:03 +00:00
Code Issues Projects Releases Wiki Activity

Slightly clarifies logic.

Browse Source
This commit is contained in:
Thomas Harte 2020-01-04 21:32:34 -05:00
parent 7b2777ac08
commit e4349f5e05
1 changed files with 6 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
Machines/Atari/ST/AtariST.cpp
View File

@ -348,13 +348,12 @@ class ConcreteMachine:
cycle.set_value8_high(ay_.get_data_output());
ay_.set_control_lines(GI::AY38910::ControlLines(0));
} else {
if(!(address&2)) {
// Select register.
ay_.set_control_lines(GI::AY38910::BC1);
} else {
// Write data to register.
ay_.set_control_lines(GI::AY38910::ControlLines(GI::AY38910::BC2 | GI::AY38910::BDIR));
}
// Net effect here: addresses with bit 1 set write to a register,
// addresses with bit 1 clear select a register.
ay_.set_control_lines(GI::AY38910::ControlLines(
GI::AY38910::BC2 | GI::AY38910::BDIR
| ((address&2) ? 0 : GI::AY38910::BC1)
));
ay_.set_data_input(cycle.value8_high());
ay_.set_control_lines(GI::AY38910::ControlLines(0));
}