diff --git a/Processors/68000/Implementation/68000Storage.cpp b/Processors/68000/Implementation/68000Storage.cpp
index f02e4178d..9fb241973 100644
--- a/Processors/68000/Implementation/68000Storage.cpp
+++ b/Processors/68000/Implementation/68000Storage.cpp
@@ -2012,9 +2012,9 @@ struct ProcessorStorageConstructor {
 						case Decoder::ADDX_SUBX: {
 							if(instruction & 0x8) {
 								// Use predecrementing address registers.
-								program.set_source(storage_, Ind, ea_register);
-								program.set_destination(storage_, Ind, data_register);
-								dumper.set_source_dest(Ind, 0, Ind, 0);
+								program.set_source(storage_, PreDec, ea_register);
+								program.set_destination(storage_, PreDec, data_register);
+								dumper.set_source_dest(PreDec, ea_register, PreDec, data_register);
 
 								if(is_long_word_access) {
 									// Access order is very atypical here: it's lower parts each for both words,