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Add randomised initial state, fix PC.
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parent
f8e6954739
commit
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@ -69,7 +69,7 @@ struct BusHandler: public CPU::MOS6502Esque::BusHandler<uint32_t> {
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using Register = CPU::MOS6502Esque::Register;
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using Register = CPU::MOS6502Esque::Register;
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const uint32_t pc =
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const uint32_t pc =
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processor.get_value_of_register(Register::ProgramCounter) |
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processor.get_value_of_register(Register::ProgramCounter) |
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(processor.get_value_of_register(Register::ProgramBank) << 8);
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(processor.get_value_of_register(Register::ProgramBank) << 16);
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inventions[pc] = ram[pc] = opcode;
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inventions[pc] = ram[pc] = opcode;
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}
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}
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@ -99,6 +99,10 @@ struct BusHandler: public CPU::MOS6502Esque::BusHandler<uint32_t> {
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// Never run the official reset procedure.
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// Never run the official reset procedure.
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processor.set_power_on(false);
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processor.set_power_on(false);
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// Make tests repeatable, at least for any given instance of
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// the runtime.
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srand(65816);
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for(int operation = 0; operation < 512; operation++) {
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for(int operation = 0; operation < 512; operation++) {
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const bool is_emulated = operation & 256;
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const bool is_emulated = operation & 256;
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const uint8_t opcode = operation & 255;
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const uint8_t opcode = operation & 255;
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@ -106,18 +110,35 @@ struct BusHandler: public CPU::MOS6502Esque::BusHandler<uint32_t> {
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// Ensure processor's next action is an opcode fetch.
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// Ensure processor's next action is an opcode fetch.
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processor.restart_operation_fetch();
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processor.restart_operation_fetch();
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// Randomise processor state.
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// Randomise most of the processor state...
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using Register = CPU::MOS6502Esque::Register;
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using Register = CPU::MOS6502Esque::Register;
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processor.set_value_of_register(Register::A, rand() >> 8);
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processor.set_value_of_register(Register::Flags, rand() >> 8);
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processor.set_value_of_register(Register::X, rand() >> 8);
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processor.set_value_of_register(Register::Y, rand() >> 8);
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processor.set_value_of_register(Register::ProgramCounter, rand() >> 8);
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processor.set_value_of_register(Register::StackPointer, rand() >> 8);
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processor.set_value_of_register(Register::DataBank, rand() >> 8);
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processor.set_value_of_register(Register::ProgramBank, rand() >> 8);
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processor.set_value_of_register(Register::Direct, rand() >> 8);
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// ... except for emulation mode, which is a given.
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// And is set last to ensure proper internal state is applied.
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processor.set_value_of_register(Register::EmulationFlag, is_emulated);
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processor.set_value_of_register(Register::EmulationFlag, is_emulated);
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// Establish the opcode.
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// Establish the opcode.
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handler.setup(processor, opcode);
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handler.setup(processor, opcode);
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// TODO: dump current state.
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// Run to the second opcode fetch.
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// Run to the second opcode fetch.
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handler.opcodes_remaining = 2;
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handler.opcodes_remaining = 2;
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try {
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try {
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processor.run_for(Cycles(100));
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processor.run_for(Cycles(100));
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} catch (const StopException &) {}
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} catch (const StopException &) {}
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// TODO: dump initial and final memory contents, and final state.
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printf("");
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}
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}
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}
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}
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