mirror of
https://github.com/TomHarte/CLK.git
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Starts building out a PowerPC decoder.
This commit is contained in:
Thomas Harte
parent
3d79b11f92
commit
ed63e7ea75
@ -844,6 +844,8 @@
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@ -1767,6 +1769,8 @@
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@ -3539,6 +3543,7 @@
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4B4DEC15252BFA9C004583AC /* 6502Esque */,
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4BF8D4CC251C0C9C00BBE21B /* 65816 */,
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4BFF1D332233778C00838EA1 /* 68000 */,
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4BDDBBD3259D757800CEFF58 /* Decoders */,
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4B77069E1EC9045B0053B588 /* Z80 */,
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);
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name = Processors;
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@ -3881,6 +3886,23 @@
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path = 5380;
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sourceTree = "<group>";
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};
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4BDDBBD3259D757800CEFF58 /* Decoders */ = {
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isa = PBXGroup;
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children = (
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4BDDBBD4259D757800CEFF58 /* PowerPC */,
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);
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path = Decoders;
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sourceTree = "<group>";
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};
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4BDDBBD4259D757800CEFF58 /* PowerPC */ = {
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isa = PBXGroup;
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children = (
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4BDDBBD5259D757800CEFF58 /* PowerPC.cpp */,
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4BDDBBD6259D757800CEFF58 /* PowerPC.hpp */,
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);
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path = PowerPC;
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sourceTree = "<group>";
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};
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@ -4607,6 +4629,7 @@
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4BD67DD1209BF27B00AB2146 /* Encoder.cpp in Sources */,
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4B89451F201967B4007DE474 /* Tape.cpp in Sources */,
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4B055AA81FAE85EF0060FFFF /* Shifter.cpp in Sources */,
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4BDDBBD8259D757800CEFF58 /* PowerPC.cpp in Sources */,
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4B8318B422D3E546006DB630 /* DriveSpeedAccumulator.cpp in Sources */,
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4B055AC81FAE9AFB0060FFFF /* C1540.cpp in Sources */,
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4B055A8F1FAE85A90060FFFF /* FileHolder.cpp in Sources */,
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@ -4749,6 +4772,7 @@
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4B45189F1F75FD1C00926311 /* AcornADF.cpp in Sources */,
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4B7BA03023C2B19C00B98D9E /* Jasmin.cpp in Sources */,
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4B7136911F789C93008B8ED9 /* SegmentParser.cpp in Sources */,
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4BDDBBD7259D757800CEFF58 /* PowerPC.cpp in Sources */,
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4B4518A21F75FD1C00926311 /* G64.cpp in Sources */,
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4B89452C201967B4007DE474 /* Tape.cpp in Sources */,
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4B448E811F1C45A00009ABD6 /* TZX.cpp in Sources */,
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174
Processors/Decoders/PowerPC/PowerPC.cpp
Normal file
174
Processors/Decoders/PowerPC/PowerPC.cpp
Normal file
@ -0,0 +1,174 @@
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//
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// PowerPC.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 12/30/20.
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// Copyright © 2020 Thomas Harte. All rights reserved.
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//
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#include "PowerPC.hpp"
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using namespace CPU::Decoder::PowerPC;
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Decoder::Decoder(Model model) : model_(model) {}
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Instruction Decoder::decode(uint32_t opcode) {
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switch(opcode >> 26) {
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case 31:
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const uint8_t dest = (opcode >> 21) & 0x1f;
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const uint8_t a = (opcode >> 16) & 0x1f;
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const uint8_t b = (opcode >> 11) & 0x1f;
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#define OECase(x) case x: case 0x200 + x
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switch((opcode >> 1) & 0x3ff) {
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case 0:
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// cmp; 601 10-26
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break;
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case 4:
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// tw; 601 10-214
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break;
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OECase(8):
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// subfcx; 601 10-207
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break;
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// case 9:
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// // mulhdux
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// break;
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OECase(10):
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// addcx; 601 10-9
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break;
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case 11:
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// mulhwux; 601 10-142
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break;
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case 19:
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// mfcr; 601 10-122
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break;
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case 20:
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// lwarx
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break;
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case 21:
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// ldx
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break;
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// lwzx
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// slwx
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// cntlzwx
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// sldx
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// andx
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// ampl
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// subfx
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// ldux
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// dcbst
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// lwzux
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// cntlzdx
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// andcx
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// td
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// mulhx
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// mulhwx
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// mfmsr
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// ldarx
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// dcbf
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// lbzx
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// negx
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// norx
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// subfex
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// adex
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// mtcrf
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// mtmsr
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// stfx
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// stwcx.
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// stwx
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// stdux
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// stwux
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// subfzex
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// addzex
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// mtsr
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// stdcx.
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// stbx
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// subfmex
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// mulld
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// addmex
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// mullwx
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// mtsrin
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// scbtst
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// stbux
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// addx
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// dcbt
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// lhzx
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// eqvx
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// tlbie
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// eciwx
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// lhzux
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// xorx
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// mfspr
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// lwax
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// lhax
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// lbia
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// mftb
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// lwaux
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// lhaux
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// sthx
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// orcx
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// sradix
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// slbie
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// ecowx
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// sthux
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// orx
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// divdux
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// divwux
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// mtspr
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// dcbi
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// nandx
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// divdx
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// divwx
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// slbia
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// mcrxr
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// lswx
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// lwbrx
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// lfsx
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// srwx
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// srdx
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// tlbsync
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// lfsux
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// mfsr
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// lswi
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// sync
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// lfdx
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// lfdux
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// mfsrin
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// stswx
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// stwbrx
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// stfsx
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// stfsux
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// stswi
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// stfdx
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// stfdux
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// lhbrx
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// srawx
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// sradx
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// srawix
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// eieio
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// ethbrx
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// extshx
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// extsbx
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// lcbi
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// stfiwx
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// extsw
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// dcbz
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OECase(138):
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// addex
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break;
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OECase(266):
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// addx
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break;
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case 28:
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// andx
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break;
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case 60:
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// andcx
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break;
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}
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#undef OECase
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break;
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}
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return Instruction();
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}
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86
Processors/Decoders/PowerPC/PowerPC.hpp
Normal file
86
Processors/Decoders/PowerPC/PowerPC.hpp
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@ -0,0 +1,86 @@
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//
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// PowerPC.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 12/30/20.
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// Copyright © 2020 Thomas Harte. All rights reserved.
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//
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#ifndef PowerPC_hpp
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#define PowerPC_hpp
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#include <cstdint>
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namespace CPU {
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namespace Decoder {
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namespace PowerPC {
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enum class Model {
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MPC601,
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};
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// TODO: complete the following table.
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enum class Operation: uint8_t {
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Undefined,
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// These 601-exclusive instructions; a lot of them are carry-overs
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// from POWER.
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absx, clcs, divx, divsx, dozx, dozi, lscbxx, maskgx, maskirx, mulx,
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nabsx, rlmix, rribx, slex, sleqx, sliqx, slliqx, sllqx, slqx,
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sraiqx, sraqx, srex, sreax, sreqx, sriqx, srliqx, srlqx, srqx,
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// 32- and 64-bit PowerPC instructions.
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addx, addcx, addex, addi, addic, addic_, addis, addmex, addzex, andx,
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andcx, andi_, andis_, bx, bcx, bcctrx, bclrx, cmp, cmpi, cmpl, cmpli,
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cntlzwx, crand, crandc, creqv, crnand, crnor, cror, crorc, crxor, dcbf,
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dcbst, dcbt, dcbtst, dcbz, divwx, divwux, eciwx, ecowx, eieio, eqvx,
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extsbx, extshx, fabsx, faddx, faddsx, fcmpo, fcmpu, fctiwx, fctiwzx,
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fdivx, fdivsx, fmaddx, fmaddsx, fmrx, fmsubx, fmsubsx, fmulx, fmulsx,
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fnabsx, fnegx, fnmaddx, fnmaddsx, fnmsubx, fnmsubsx, frspx, fsubx, fsubsx,
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icbi, isync, lbz, lbzu, lbzux, lbzx, lfd, lfdu, lfdux, lfdx, lfs, lfsu,
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lfsux, lfsx, lha, lhau, lhaux, lhax, lhbrx, lhz, lhzu, lhzux, lhzx, lmw,
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lswi, lswx, lwarx, lwbrx, lwz, lwzu, lwzux, lwzx, mcrf, mcrfs, mcrxr,
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mfcr, mffsx, mfmsr, mfspr, mfsr, mfsrin, mtcrf, mtfsb0x, mtfsb1x, mtfsfx,
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mtfsfix, mtmsr, mtspr, mtsr, mtsrin, mulhwx, mulhwux, mulli, mullwx,
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nandx, negx, norx, orx, orcx, ori, oris, rfi, rlwimix, rlwinmx, rlwnmx,
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sc, slwx, srawx, srawix, srwx, stb, stbu, stbux, stbx, stfd, stfdu,
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stfdux, stfdx, stfs, stfsu, stfsux, stfsx, sth, sthbrx, sthu, sthux, sthx,
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stmw, stswi, stswx, stw, stwbrx, stwcx_, stwu, stwux, stwx, subfx, subfcx,
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subfex, subfic, subfmex, subfzex, sync, tlbie, tw, twi, xorx, xori, xoris,
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// 32-bit, supervisor level.
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dcbi,
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// Optional.
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fresx, frsqrtex, fselx, fsqrtx, frsqrtsx, slbia, slbie,
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// 64-bit only PowerPC instructions.
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cntlzdx, divdx, divdux, extswx, fcfidx, fctidx, fctidzx
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};
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struct Instruction {
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Operation operation = Operation::Undefined;
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//
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Instruction() {}
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Instruction(Operation operation) : operation(operation) {}
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};
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struct Decoder {
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public:
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Decoder(Model model);
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Instruction decode(uint32_t opcode);
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private:
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Model model_;
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};
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}
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}
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}
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#include <stdio.h>
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#endif /* PowerPC_hpp */
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