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Fix PC-relative fetches.

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This commit is contained in:
Thomas Harte 2022-05-20 14:42:51 -04:00
parent d157819c49
commit ee942c5c17
2 changed files with 9 additions and 8 deletions
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9
OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm
View File

@ -85,7 +85,7 @@ struct TestExecutor {
/// Binds a bus-accurate 68000 to 16mb of RAM.
struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
uint8_t *const ram;
CPU::MC68000Mk2::Processor<TestProcessor, true, false, true> processor;
CPU::MC68000Mk2::Processor<TestProcessor, true, true, true> processor;
std::function<void(void)> comparitor;
TestProcessor(uint8_t *ram) : ram(ram), processor(*this) {}
@ -156,7 +156,7 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
// To limit tests run to a subset of files and/or of tests, uncomment and fill in below.
_fileSet = [NSSet setWithArray:@[
@"btst_bchg_bclr_bset.json",
// @"chk.json",
// Below this line are passing tests.
@"abcd_sbcd.json",
@ -165,6 +165,7 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
@"addq_subq.json",
@"addx_subx.json",
@"bcc.json",
@"btst_bchg_bclr_bset.json",
@"cmp.json",
@"dbcc_scc.json",
@"eor_and_or.json",
@ -173,8 +174,8 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
@"nbcd.json",
@"ext.json",
@"swap.json",
]]; // 14/32 = ~44 % done, as far as the tests go.
// _testSet = [NSSet setWithArray:@[@"ADDQ 05df"]];
]]; // 15/32 = ~47 % done, as far as the tests go.
// _testSet = [NSSet setWithArray:@[@"BCLR 0122"]];
}
- (void)testAll {

8
Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
View File

@ -817,7 +817,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
//
BeginState(FetchProgramCounterIndirectWithDisplacement_bw):
effective_address_[next_operand_] =
instruction_address_.l + 2 +
program_counter_.l - 2 +
int16_t(prefetch_.w);
SetDataAddress(effective_address_[next_operand_]);
@ -827,7 +827,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
BeginState(FetchProgramCounterIndirectWithDisplacement_l):
effective_address_[next_operand_] =
instruction_address_.l + 2 +
program_counter_.l - 2 +
int16_t(prefetch_.w);
SetDataAddress(effective_address_[next_operand_]);
@ -871,7 +871,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
// ProgramCounterIndirectWithIndex8bitDisplacement
//
BeginState(FetchProgramCounterIndirectWithIndex8bitDisplacement_bw):
effective_address_[next_operand_] = d8Xn(instruction_address_.l + 2);
effective_address_[next_operand_] = d8Xn(program_counter_.l - 2);
SetDataAddress(effective_address_[next_operand_]);
IdleBus(1); // n
@ -880,7 +880,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
MoveToNextOperand(FetchOperand_bw);
BeginState(FetchProgramCounterIndirectWithIndex8bitDisplacement_l):
effective_address_[next_operand_] = d8Xn(instruction_address_.l + 2);;
effective_address_[next_operand_] = d8Xn(program_counter_.l - 2);;
SetDataAddress(effective_address_[next_operand_]);
IdleBus(1); // n