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Added wait state hooks to the interrupt programs, and added an is_wait query on PartialMachineCycle.
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@ -76,14 +76,16 @@ struct PartialMachineCycle {
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Internal,
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Internal,
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BusAcknowledge,
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BusAcknowledge,
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ReadStart,
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ReadWait,
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ReadWait,
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WriteStart,
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WriteWait,
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WriteWait,
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InputStart,
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InputWait,
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InputWait,
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OutputWait,
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InterruptWait,
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ReadStart,
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WriteStart,
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InputStart,
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OutputStart,
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OutputStart,
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OutputWait
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} operation;
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} operation;
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int length;
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int length;
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uint16_t *address;
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uint16_t *address;
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@ -96,6 +98,9 @@ struct PartialMachineCycle {
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inline bool is_terminal() const {
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inline bool is_terminal() const {
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return operation <= Operation::BusAcknowledge;
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return operation <= Operation::BusAcknowledge;
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}
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}
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inline bool is_wait() const {
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return operation >= Operation::ReadWait && operation <= Operation::InterruptWait;
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}
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};
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};
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// Elemental bus operations
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// Elemental bus operations
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@ -115,11 +120,12 @@ struct PartialMachineCycle {
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#define InputWait(addr, val, f) {PartialMachineCycle::InputWait, 1, &addr.full, &val, f}
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#define InputWait(addr, val, f) {PartialMachineCycle::InputWait, 1, &addr.full, &val, f}
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#define InputEnd(addr, val) {PartialMachineCycle::Input, 1, &addr.full, &val, false}
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#define InputEnd(addr, val) {PartialMachineCycle::Input, 1, &addr.full, &val, false}
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#define OutputStart(addr, val) {PartialMachineCycle::OutputStart, 2, &addr.full, &val}
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#define OutputStart(addr, val) {PartialMachineCycle::OutputStart, 2, &addr.full, &val, false}
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#define OutputWait(addr, val, f) {PartialMachineCycle::OutputWait, 1, &addr.full, &val, f}
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#define OutputWait(addr, val, f) {PartialMachineCycle::OutputWait, 1, &addr.full, &val, f}
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#define OutputEnd(addr, val) {PartialMachineCycle::Output, 1, &addr.full, &val}
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#define OutputEnd(addr, val) {PartialMachineCycle::Output, 1, &addr.full, &val, false}
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#define IntAck(length, val) {PartialMachineCycle::Interrupt, length, nullptr, &val}
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#define IntAck(length, val) {PartialMachineCycle::Interrupt, length, nullptr, &val, false}
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#define IntWait(val) {PartialMachineCycle::InterruptWait, 1, nullptr, &val, true}
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// A wrapper to express a bus operation as a micro-op
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// A wrapper to express a bus operation as a micro-op
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#define BusOp(op) {MicroOp::BusOperation, nullptr, nullptr, op}
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#define BusOp(op) {MicroOp::BusOperation, nullptr, nullptr, op}
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@ -134,7 +140,7 @@ struct PartialMachineCycle {
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#define Input(addr, val) BusOp(InputStart(addr, val)), BusOp(InputWait(addr, val, false)), BusOp(InputWait(addr, val, true)), BusOp(InputEnd(addr, val))
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#define Input(addr, val) BusOp(InputStart(addr, val)), BusOp(InputWait(addr, val, false)), BusOp(InputWait(addr, val, true)), BusOp(InputEnd(addr, val))
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#define Output(addr, val) BusOp(OutputStart(addr, val)), BusOp(OutputWait(addr, val, false)), BusOp(OutputWait(addr, val, true)), BusOp(OutputEnd(addr, val))
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#define Output(addr, val) BusOp(OutputStart(addr, val)), BusOp(OutputWait(addr, val, false)), BusOp(OutputWait(addr, val, true)), BusOp(OutputEnd(addr, val))
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#define InternalOperation(len) {MicroOp::BusOperation, nullptr, nullptr, {PartialMachineCycle::Internal, len}}
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#define InternalOperation(len) {MicroOp::BusOperation, nullptr, nullptr, {PartialMachineCycle::Internal, len, nullptr, nullptr, false}}
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/// A sequence is a series of micro-ops that ends in a move-to-next-program operation.
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/// A sequence is a series of micro-ops that ends in a move-to-next-program operation.
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#define Sequence(...) { __VA_ARGS__, {MicroOp::MoveToNextProgram} }
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#define Sequence(...) { __VA_ARGS__, {MicroOp::MoveToNextProgram} }
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@ -800,6 +806,7 @@ template <class T> class Processor {
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{ MicroOp::BeginNMI },
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{ MicroOp::BeginNMI },
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BusOp(ReadOpcodeStart()),
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BusOp(ReadOpcodeStart()),
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BusOp(ReadOpcodeWait(1, false)),
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BusOp(ReadOpcodeWait(1, false)),
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BusOp(ReadOpcodeWait(1, true)),
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BusOp(Refresh(2)),
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BusOp(Refresh(2)),
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Push(pc_),
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Push(pc_),
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{ MicroOp::JumpTo66, nullptr, nullptr},
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{ MicroOp::JumpTo66, nullptr, nullptr},
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@ -808,11 +815,13 @@ template <class T> class Processor {
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MicroOp irq_mode0_program[] = {
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MicroOp irq_mode0_program[] = {
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{ MicroOp::BeginIRQMode0 },
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{ MicroOp::BeginIRQMode0 },
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BusOp(IntAck(4, operation_)),
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BusOp(IntAck(4, operation_)),
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BusOp(IntWait(operation_)),
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{ MicroOp::DecodeOperationNoRChange }
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{ MicroOp::DecodeOperationNoRChange }
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};
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};
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MicroOp irq_mode1_program[] = {
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MicroOp irq_mode1_program[] = {
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{ MicroOp::BeginIRQ },
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{ MicroOp::BeginIRQ },
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BusOp(IntAck(5, operation_)),
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BusOp(IntAck(5, operation_)),
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BusOp(IntWait(operation_)),
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BusOp(Refresh(2)),
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BusOp(Refresh(2)),
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Push(pc_),
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Push(pc_),
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{ MicroOp::Move16, &temp16_.full, &pc_.full },
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{ MicroOp::Move16, &temp16_.full, &pc_.full },
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@ -821,6 +830,7 @@ template <class T> class Processor {
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MicroOp irq_mode2_program[] = {
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MicroOp irq_mode2_program[] = {
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{ MicroOp::BeginIRQ },
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{ MicroOp::BeginIRQ },
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BusOp(IntAck(5, temp16_.bytes.low)),
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BusOp(IntAck(5, temp16_.bytes.low)),
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BusOp(IntWait(temp16_.bytes.low)),
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BusOp(Refresh(2)),
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BusOp(Refresh(2)),
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Push(pc_),
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Push(pc_),
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{ MicroOp::Move8, &ir_.bytes.high, &temp16_.bytes.high },
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{ MicroOp::Move8, &ir_.bytes.high, &temp16_.bytes.high },
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@ -872,7 +882,7 @@ template <class T> class Processor {
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while(1) {
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while(1) {
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while(bus_request_line_) {
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while(bus_request_line_) {
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static PartialMachineCycle bus_acknowledge_cycle = {PartialMachineCycle::BusAcknowledge, 1};
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static PartialMachineCycle bus_acknowledge_cycle = {PartialMachineCycle::BusAcknowledge, 1, nullptr, nullptr, false};
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number_of_cycles_ -= static_cast<T *>(this)->perform_machine_cycle(bus_acknowledge_cycle) + 1;
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number_of_cycles_ -= static_cast<T *>(this)->perform_machine_cycle(bus_acknowledge_cycle) + 1;
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if(!number_of_cycles_) {
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if(!number_of_cycles_) {
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static_cast<T *>(this)->flush();
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static_cast<T *>(this)->flush();
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