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https://github.com/TomHarte/CLK.git
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Test a single, whole instruction; record read/write.
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parent
6efb9b24e0
commit
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@ -56,6 +56,7 @@ struct Transaction {
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uint16_t value = 0;
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bool address_strobe = false;
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bool data_strobe = false;
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bool read = false;
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bool operator !=(const Transaction &rhs) const {
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// if(timestamp != rhs.timestamp) return true;
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@ -68,7 +69,7 @@ struct Transaction {
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}
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void print() const {
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printf("%d: %d%d%d %c %c @ %06x with %04x\n",
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printf("%d: %d%d%d %c %c @ %06x %s %04x\n",
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timestamp.as<int>(),
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(function_code >> 2) & 1,
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(function_code >> 1) & 1,
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@ -76,13 +77,23 @@ struct Transaction {
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address_strobe ? 'a' : '-',
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data_strobe ? 'd' : '-',
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address,
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read ? "->" : "<-",
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value);
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}
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};
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struct HarmlessStopException {};
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struct BusHandler {
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BusHandler(RandomStore &_store, uint8_t _participant) : store(_store), participant(_participant) {}
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void will_perform(uint32_t, uint16_t) {
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--instructions;
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if(instructions < 0) {
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throw HarmlessStopException{};
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}
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}
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template <typename Microcycle> HalfCycles perform_bus_operation(const Microcycle &cycle, bool is_supervisor) {
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Transaction transaction;
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@ -98,6 +109,7 @@ struct BusHandler {
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transaction.data_strobe = cycle.operation & (Microcycle::SelectByte | Microcycle::SelectWord);
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if(cycle.address) transaction.address = *cycle.address & 0xffff'ff;
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transaction.timestamp = time;
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transaction.read = cycle.operation & Microcycle::Read;
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time += cycle.length;
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@ -155,9 +167,7 @@ struct BusHandler {
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time = HalfCycles(0);
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}
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} else {
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if(transaction.timestamp < time_cutoff) {
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transactions.push_back(transaction);
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}
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transactions.push_back(transaction);
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}
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}
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@ -167,7 +177,7 @@ struct BusHandler {
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void flush() {}
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int transaction_delay;
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HalfCycles time_cutoff;
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int instructions;
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HalfCycles time;
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std::vector<Transaction> transactions;
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@ -194,15 +204,18 @@ struct BusHandler {
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const uint8_t participant;
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};
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using OldProcessor = CPU::MC68000::Processor<BusHandler, true>;
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using NewProcessor = CPU::MC68000Mk2::Processor<BusHandler, true, true>;
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using OldProcessor = CPU::MC68000::Processor<BusHandler, true, true>;
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using NewProcessor = CPU::MC68000Mk2::Processor<BusHandler, true, true, true>;
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template <typename M68000> struct Tester {
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Tester(RandomStore &store, uint8_t participant) : bus_handler(store, participant), processor(bus_handler) {}
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void advance(int cycles, HalfCycles time_cutoff) {
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bus_handler.time_cutoff = time_cutoff;
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processor.run_for(HalfCycles(cycles << 1));
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void run_instructions(int instructions) {
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bus_handler.instructions = instructions;
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try {
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processor.run_for(HalfCycles::max());
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} catch (const HarmlessStopException &) {}
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}
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void reset_with_opcode(uint16_t opcode) {
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@ -257,9 +270,9 @@ template <typename M68000> struct Tester {
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newTester->reset_with_opcode(c);
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oldTester->reset_with_opcode(c);
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// For arbitrary resons, only run for 200 bus cycles, capturing up to 200 clock cycles of activity.
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newTester->advance(200, HalfCycles(400));
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oldTester->advance(200, HalfCycles(400));
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// Run a single instruction.
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newTester->run_instructions(1);
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oldTester->run_instructions(1);
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// Compare bus activity.
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const auto &oldTransactions = oldTester->bus_handler.transactions;
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