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https://github.com/TomHarte/CLK.git
synced 2025-08-13 15:25:56 +00:00
Adds some extra exposition.
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@@ -17,6 +17,8 @@ Storage::Disk::PCMSegment Storage::Disk::track_serialisation(const Track &track,
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DigitalPhaseLockedLoop pll(100, history_size);
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DigitalPhaseLockedLoop pll(100, history_size);
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std::unique_ptr<Track> track_copy(track.clone());
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std::unique_ptr<Track> track_copy(track.clone());
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// ResultAccumulator exists to append whatever comes out of the PLL to
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// its PCMSegment.
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struct ResultAccumulator: public DigitalPhaseLockedLoop::Delegate {
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struct ResultAccumulator: public DigitalPhaseLockedLoop::Delegate {
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PCMSegment result;
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PCMSegment result;
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void digital_phase_locked_loop_output_bit(int value) {
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void digital_phase_locked_loop_output_bit(int value) {
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@@ -25,6 +27,9 @@ Storage::Disk::PCMSegment Storage::Disk::track_serialisation(const Track &track,
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} result_accumulator;
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} result_accumulator;
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result_accumulator.result.length_of_a_bit = length_of_a_bit;
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result_accumulator.result.length_of_a_bit = length_of_a_bit;
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// Obtain a length multiplier which is 100 times the reciprocal
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// of the expected bit length. So a perfect bit length from
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// the source data will come out as 100 ticks.
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Time length_multiplier = Time(100*length_of_a_bit.clock_rate, length_of_a_bit.length);
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Time length_multiplier = Time(100*length_of_a_bit.clock_rate, length_of_a_bit.length);
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length_multiplier.simplify();
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length_multiplier.simplify();
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