From f7b119ffe1b69e6238b982c574e1c70b00ceaa27 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Wed, 7 Oct 2020 19:57:58 -0400 Subject: [PATCH] Moves temporary logging, fixes branch instructions. --- .../Mac/Clock SignalTests/KlausDormannTests.swift | 2 +- Processors/6502/AllRAM/6502AllRAM.cpp | 6 ++++++ Processors/65816/Implementation/65816Base.cpp | 14 +++++++------- .../65816/Implementation/65816Implementation.hpp | 12 +++++------- 4 files changed, 19 insertions(+), 15 deletions(-) diff --git a/OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift b/OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift index b772fe5d0..6fb98d533 100644 --- a/OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift +++ b/OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift @@ -44,7 +44,7 @@ class KlausDormannTests: XCTestCase { switch address { case 0x3399: return nil // success! - case 0x052a: return "TAX, DEX or LDA did not correctly set flags" + case 0x052a: return "TAX, DEX or LDA did not correctly set flags, or BEQ did not branch correctly" case 0x33a7: return "Decimal ADC result has wrong value" case 0x3502: return "Binary SBC result has wrong value" case 0x33b9: return "Decimal SBC result has wrong value" diff --git a/Processors/6502/AllRAM/6502AllRAM.cpp b/Processors/6502/AllRAM/6502AllRAM.cpp index 0381384b4..cc7d6f8b5 100644 --- a/Processors/6502/AllRAM/6502AllRAM.cpp +++ b/Processors/6502/AllRAM/6502AllRAM.cpp @@ -28,6 +28,12 @@ template class ConcreteAllRAMProcessor: public AllRAMProcessor, publ timestamp_ += Cycles(1); if(operation == BusOperation::ReadOpcode) { + // TEMPORARY LOGGING. TODO: remove. + printf("[%04x] %02x a:%04x x:%04x y:%04x p:%02x\n", address, memory_[address], + mos6502_.get_value_of_register(Register::A), + mos6502_.get_value_of_register(Register::X), + mos6502_.get_value_of_register(Register::Y), + mos6502_.get_value_of_register(Register::Flags)); check_address_for_trap(address); } diff --git a/Processors/65816/Implementation/65816Base.cpp b/Processors/65816/Implementation/65816Base.cpp index 736ed2268..3416217f2 100644 --- a/Processors/65816/Implementation/65816Base.cpp +++ b/Processors/65816/Implementation/65816Base.cpp @@ -15,7 +15,7 @@ uint16_t ProcessorBase::get_value_of_register(Register r) const { case Register::ProgramCounter: return pc_; case Register::LastOperationAddress: return last_operation_pc_; case Register::StackPointer: return s_.full; -// case Register::Flags: return get_flags(); + case Register::Flags: return flags_.get(); // TODO: include additional flags (and below). case Register::A: return a_.full; case Register::X: return x_.full; case Register::Y: return y_.full; @@ -25,12 +25,12 @@ uint16_t ProcessorBase::get_value_of_register(Register r) const { void ProcessorBase::set_value_of_register(Register r, uint16_t value) { switch (r) { - case Register::ProgramCounter: pc_ = value; break; - case Register::StackPointer: s_.full = value; break; -// case Register::Flags: set_flags(uint8_t(value)); break; - case Register::A: a_.full = value; break; - case Register::X: x_.full = value; break; - case Register::Y: y_.full = value; break; + case Register::ProgramCounter: pc_ = value; break; + case Register::StackPointer: s_.full = value; break; + case Register::Flags: flags_.set(uint8_t(value)); break; + case Register::A: a_.full = value; break; + case Register::X: x_.full = value; break; + case Register::Y: y_.full = value; break; default: break; } } diff --git a/Processors/65816/Implementation/65816Implementation.hpp b/Processors/65816/Implementation/65816Implementation.hpp index 3a5f8a387..b39fee9a4 100644 --- a/Processors/65816/Implementation/65816Implementation.hpp +++ b/Processors/65816/Implementation/65816Implementation.hpp @@ -50,8 +50,6 @@ template void Processor::run_for(const Cycles } continue; case OperationDecode: { - // A VERY TEMPORARY piece of logging. - printf("[%04x] %02x a:%04x x:%04x y:%04x p:%02x\n", pc_ - 1, instruction_buffer_.value, a_.full, x_.full, y_.full, flags_.get()); // pc_ - 1 would be correct but this matches a log I made of the 6502. active_instruction_ = &instructions[instruction_buffer_.value]; const auto size_flag = mx_flags_[active_instruction_->size_field]; @@ -539,11 +537,11 @@ template void Processor::run_for(const Cycles next_op_ += 3; \ } else { \ data_buffer_.size = 2; \ - data_buffer_.value = pc_ + int8_t(data_buffer_.value); \ - \ - if((pc_ & 0xff00) == (data_buffer_.value & 0xff00)) { \ - ++next_op_; \ - } \ + data_buffer_.value = pc_ + int8_t(instruction_buffer_.value); \ + \ + if((pc_ & 0xff00) == (instruction_buffer_.value & 0xff00)) { \ + ++next_op_; \ + } \ } case BPL: BRA(!(flags_.negative_result&0x80)); break;