6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-01-11 08:30:55 +00:00
Code Issues Projects Releases Wiki Activity

Ensures assert is completely excluded if NDEBUG.

Browse Source
This commit is contained in:
Thomas Harte 2019-07-08 18:00:37 -04:00
parent ea7899f47d
commit fb352a8d40
1 changed files with 5 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
Processors/68000/Implementation/68000Implementation.hpp
View File

@ -51,9 +51,14 @@
// Sets the length of the next microcycle; if this is a debug build, also confirms
// that the microcycle being adjusted is the one that it's permissible to adjust.
#ifdef NDEBUG
#define set_next_microcycle_length(x) \
bus_program->microcycle.length = x
#else
#define set_next_microcycle_length(x) \
assert(bus_program->microcycle.is_resizeable); \
bus_program->microcycle.length = x
#endif
template <class T, bool dtack_is_implicit, bool signal_will_perform> void Processor<T, dtack_is_implicit, signal_will_perform>::run_for(HalfCycles duration) {
const HalfCycles remaining_duration = duration + half_cycles_left_to_run_;