From fba210f7ce9fe1c8b2d7f114c4b9ba377675caf7 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Mon, 15 Apr 2019 09:30:49 -0400 Subject: [PATCH] Corrects MOVE.l Dn, (An)[+]. --- .../xcshareddata/xcschemes/Clock Signal.xcscheme | 3 +-- OSBindings/Mac/Clock SignalTests/QLTests.mm | 4 ++++ Processors/68000/Implementation/68000Storage.cpp | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme b/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme index 95b31a9ca..9c2dca9ce 100644 --- a/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme +++ b/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme @@ -26,8 +26,7 @@ buildConfiguration = "Debug" selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB" selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB" - enableAddressSanitizer = "YES" - enableUBSanitizer = "YES" + disableMainThreadChecker = "YES" codeCoverageEnabled = "YES" shouldUseLaunchSchemeArgsEnv = "YES"> diff --git a/OSBindings/Mac/Clock SignalTests/QLTests.mm b/OSBindings/Mac/Clock SignalTests/QLTests.mm index 678e22a2f..4e5396333 100644 --- a/OSBindings/Mac/Clock SignalTests/QLTests.mm +++ b/OSBindings/Mac/Clock SignalTests/QLTests.mm @@ -71,17 +71,21 @@ class QL: public CPU::MC68000::BusHandler { default: break; case Microcycle::SelectWord | Microcycle::Read: +// printf("[word r %08x] ", *cycle.address); cycle.value->full = is_peripheral ? peripheral_result : base[word_address]; break; case Microcycle::SelectByte | Microcycle::Read: +// printf("[byte r %08x] ", *cycle.address); cycle.value->halves.low = (is_peripheral ? peripheral_result : base[word_address]) >> cycle.byte_shift(); break; case Microcycle::SelectWord: assert(!(is_rom && !is_peripheral)); +// printf("[word w %08x <- %04x] ", *cycle.address, cycle.value->full); base[word_address] = cycle.value->full; break; case Microcycle::SelectByte: assert(!(is_rom && !is_peripheral)); +// printf("[byte w %08x <- %02x] ", *cycle.address, (cycle.value->full >> cycle.byte_shift()) & 0xff); base[word_address] = (cycle.value->full & cycle.byte_mask()) | (base[word_address] & (0xffff ^ cycle.byte_mask())); break; } diff --git a/Processors/68000/Implementation/68000Storage.cpp b/Processors/68000/Implementation/68000Storage.cpp index 7fb3b2648..5e817e5b6 100644 --- a/Processors/68000/Implementation/68000Storage.cpp +++ b/Processors/68000/Implementation/68000Storage.cpp @@ -1749,7 +1749,7 @@ struct ProcessorStorageConstructor { case l2(Dn, Ind): // MOVE.l Dn, (An) case l2(Dn, PostInc): // MOVE.l Dn, (An)+ op(int(Action::CopyToEffectiveAddress) | MicroOp::DestinationMask); - op(Action::SetMoveFlagsl, seq("nW+ nw np", { ea(1), ea(1) })); + op(Action::PerformOperation, seq("nW+ nw np", { ea(1), ea(1) })); if(destination_mode == PostInc) { op(increment_action | MicroOp::DestinationMask); }