6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-04 15:05:36 +00:00
Code Issues Projects Releases Wiki Activity

Double down on trans mode.

Browse Source
This commit is contained in:
Thomas Harte 2024-03-25 21:32:56 -04:00
parent a2d95cb982
commit fc880ac130
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
Machines/Acorn/Archimedes/MemoryController.hpp
View File

@ -60,9 +60,9 @@ struct MemoryController {
}
template <typename IntT>
bool write(uint32_t address, IntT source, InstructionSet::ARM::Mode mode, bool trans) {
bool write(uint32_t address, IntT source, InstructionSet::ARM::Mode, bool trans) {
// User mode may only _write_ to logically-mapped RAM (subject to further testing below).
if(mode == InstructionSet::ARM::Mode::User && address >= 0x200'0000) {
if(trans && address >= 0x200'0000) {
return false;
}
@ -142,9 +142,9 @@ struct MemoryController {
}
template <typename IntT>
bool read(uint32_t address, IntT &source, InstructionSet::ARM::Mode mode, bool trans) {
bool read(uint32_t address, IntT &source, InstructionSet::ARM::Mode, bool trans) {
// User mode may only read logically-maped RAM and ROM.
if(mode == InstructionSet::ARM::Mode::User && address >= 0x200'0000 && address < 0x380'0000) {
if(trans && address >= 0x200'0000 && address < 0x380'0000) {
return false;
}