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https://github.com/TomHarte/CLK.git
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Attempted to give the PLL a litte extra leeway, and fixed PCMTrack
length test.
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parent
8f62211f5e
commit
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@ -11,11 +11,11 @@
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using namespace Storage;
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DiskDrive::DiskDrive(unsigned int clock_rate, unsigned int revolutions_per_minute) :
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_clock_rate(clock_rate),
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_clock_rate(clock_rate * 16),
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_revolutions_per_minute(revolutions_per_minute),
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_head_position(0),
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TimedEventLoop(clock_rate)
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TimedEventLoop(clock_rate * 16)
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{}
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void DiskDrive::set_expected_bit_length(Time bit_length)
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@ -63,6 +63,8 @@ void DiskDrive::run_for_cycles(int number_of_cycles)
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if(has_disk())
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{
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_cycles_since_index_hole += (unsigned int)number_of_cycles;
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number_of_cycles *= 16;
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_pll->run_for_cycles(number_of_cycles);
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TimedEventLoop::run_for_cycles(number_of_cycles);
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}
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@ -100,6 +102,7 @@ void DiskDrive::process_next_event()
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case Track::Event::IndexHole:
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_cycles_since_index_hole = 0;
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process_index_hole();
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printf("\n");
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break;
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}
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get_next_event();
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@ -33,7 +33,7 @@ PCMTrack::Event PCMTrack::get_next_event()
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{
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unsigned int clock_multiplier = _track_clock_rate / _segments[_segment_pointer].length_of_a_bit.clock_rate;
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const uint8_t *segment_data = _segments[_segment_pointer].data.get();
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while(_bit_pointer < _segments[_segment_pointer].length_of_a_bit.length)
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while(_bit_pointer < _segments[_segment_pointer].number_of_bits)
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{
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// for timing simplicity, bits are modelled as happening at the end of their window
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// TODO: should I account for the converse bit ordering? Or can I assume MSB first?
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@ -66,7 +66,7 @@ void PCMTrack::fix_length()
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_track_clock_rate = NumberTheory::least_common_multiple(_track_clock_rate, _segments[c].length_of_a_bit.clock_rate);
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}
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// therby determine the total length, storing it to next_event as the track-total divisor
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// thereby determine the total length, storing it to next_event as the track-total divisor
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_next_event.length.clock_rate = 0;
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for(size_t c = 0; c < _segments.size(); c++)
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{
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