201 Commits

Author	SHA1	Message	Date
Thomas Harte	c5dc65fc61	Resolve various whitespace errors.	2025-10-29 11:50:56 -04:00
Thomas Harte	02a29056b7	Resolve IP size imbalance.	2025-10-29 09:16:30 -04:00
Thomas Harte	78a2b27e65	Attempt LSL, LAR.	2025-08-13 13:43:19 -04:00
Thomas Harte	0e498829f7	Attempt VERR, VERW. ... Without complete success; IBM's third invocation (which I think is a VERR) doesn't give the result that BIOS is looking for.	2025-08-12 17:22:14 -04:00
Thomas Harte	ddd090d581	Implement STR.	2025-08-12 16:21:23 -04:00
Thomas Harte	4cd979e5fb	Take a shot at LTR.	2025-08-12 13:49:59 -04:00
Thomas Harte	4ee30dc36f	Correct stack validation, fixing POPA. ... 71 failures.	2025-08-08 11:05:01 -04:00
Thomas Harte	03c70b49ba	Throw GPF for overlong instructions; fix BOUND validation. ... 79 failures outstanding.	2025-08-08 09:43:16 -04:00
Thomas Harte	4b2d8e13d1	Add consts, TODO.	2025-08-08 07:39:34 -04:00
Thomas Harte	32666d304f	Filter out some illegal JMP/CALL fars. ... Failure count now: 5,966.	2025-08-07 09:18:23 -04:00
Thomas Harte	7c4df23c1c	Fix BOUND. ... 7085 remaining failures.	2025-08-06 22:19:35 -04:00
Thomas Harte	03c6a60f68	Avoid extra judgment on LEAVE. ... Failures remaining: 16,295.	2025-08-06 17:19:20 -04:00
Thomas Harte	76284eb462	Fix 8088 assumption about unused flags; 80286 PUSHF now passes amongst others. ... 51,091 failures still to fix though.	2025-08-06 15:31:03 -04:00
Thomas Harte	01fbe2d3de	Support 808286 STOS oddities.	2025-08-06 13:37:34 -04:00
Thomas Harte	4ceab01ed4	Fix result of IMUL_3.	2025-08-04 21:05:14 -04:00
Thomas Harte	19a78ef1ac	Correct for 286+ PUSH SP.	2025-08-04 17:23:02 -04:00
Thomas Harte	ef03841efa	Deal with potential reason for wrong top-of-flags.	2025-08-04 17:14:16 -04:00
Thomas Harte	c148d9ee6c	Ensure ENTER can execute.	2025-08-03 17:30:02 -04:00
Thomas Harte	9dfe59a104	Take a swing at three-operand IMUL.	2025-08-02 22:23:34 -04:00
Thomas Harte	9a25d601f1	Fully transfer faulting logic.	2025-08-02 18:37:56 -04:00
Thomas Harte	846f745e2c	Attempt to transfer ownership of fault.	2025-08-02 18:26:00 -04:00
Thomas Harte	bf257a8d9e	Adjust ownership for segment load detection.	2025-05-28 22:08:43 -04:00
Thomas Harte	8041b87317	Introduce segment preauthorisation.	2025-05-18 22:11:23 -04:00
Thomas Harte	b3000f6350	Made mode knowable; factor out main part of far jump.	2025-05-17 23:08:07 -04:00
Thomas Harte	947baab269	Add TODO.	2025-05-14 22:12:59 -04:00
Thomas Harte	a41ea90ca7	Implement CLTS.	2025-05-14 21:08:26 -04:00
Thomas Harte	8b3f0d8fd6	Implement ARPL.	2025-05-14 21:01:48 -04:00
Thomas Harte	9e5235fd30	Descriptor tables are always at most 64kb.	2025-05-13 14:07:28 -04:00
Thomas Harte	159f3cb780	Add SLDT.	2025-05-12 23:17:34 -04:00
Thomas Harte	275e75980c	Take initial swing at LLDT.	2025-05-12 17:22:11 -04:00
Thomas Harte	6934618589	Add note to self.	2025-05-11 22:53:28 -04:00
Thomas Harte	0d34960d60	Properly place ownership of linear authorisation.	2025-05-11 21:36:36 -04:00
Thomas Harte	9b51fe3db4	Take a shot at IDT dispatch.	2025-05-10 21:34:43 -04:00
Thomas Harte	8c9df5556d	Generalise support for multiple speeds.	2025-05-05 22:55:23 -04:00
Thomas Harte	32495f47b3	Bifurcate descriptor types.	2025-05-05 17:26:39 -04:00
Thomas Harte	fa2cc0f62e	Proceed as far as believing I probably need a gate descriptor type.	2025-05-04 22:11:53 -04:00
Thomas Harte	8a2468a4fb	Apply IDT reset condition, factor in to real-mode interrupts.	2025-05-04 16:57:14 -04:00
Thomas Harte	0a60e38d82	Abandon Interrupt naming.	2025-05-02 10:23:20 -04:00
Thomas Harte	f53b40e127	Focus on an Exception as the interrupt token.	2025-05-01 22:36:58 -04:00
Thomas Harte	4df51a00ed	Try to be a bit more rigorous in exception generation syntax.	2025-05-01 17:17:29 -04:00
Thomas Harte	f6bb502e87	Start bashing out an attempt at is_context.	2025-04-27 23:40:40 -04:00
Thomas Harte	6cf825d3d8	Lock down Intruction type.	2025-04-27 21:43:46 -04:00
Thomas Harte	fbd81b9930	Merge branch 'master' into Descriptors	2025-04-21 22:43:30 -04:00
Thomas Harte	54f509c210	Enforce size restriction.	2025-04-20 23:27:44 -04:00
Thomas Harte	f41629daae	Add compiler-calming fallthroughs.	2025-04-20 22:19:11 -04:00
Thomas Harte	7721f74200	Further flesh out descriptors: decode all bits, add printf warnings.	2025-04-10 17:07:45 -04:00
Thomas Harte	afc3a8d373	Correct header path.	2025-03-31 09:54:11 -04:00
Thomas Harte	d6376d0ddf	Remove improper header.	2025-03-31 09:33:30 -04:00
Thomas Harte	1cca711560	Name MSW bits.	2025-03-30 14:04:43 -04:00
Thomas Harte	42edc46887	Add invalid-opcode exception; transcribe has-code table.	2025-03-30 13:29:20 -04:00