Commit Graph
19 Commits
Author SHA1 Message Date
Thomas Harte 92467b02da Change 6821 interrupt clearing condition: must read data register. 2026-05-13 17:41:01 -04:00
Thomas Harte 779b370796 Make 6847 just-in-time; wire through IRQs. 2026-05-06 17:31:03 -04:00
Thomas Harte 940708bd07 Support floating bus going either way. 2026-04-16 21:52:10 -04:00
Thomas Harte 363072078b Add TODO, remove TODO. 2026-04-12 09:26:03 -04:00
Thomas Harte 05a85b6ba9 Resolve various compiler warnings: primarily ~'s promotion to int. 2026-03-25 13:57:32 -04:00
Thomas Harte fa136b89fa Do enough of C2 output to catch the tape motor. 2026-03-23 16:23:34 -04:00
Thomas Harte 66af2c00a8 Add TODO. 2026-03-22 23:06:19 -04:00
Thomas Harte 1be89a3dd5 Fix 6821 read decoding; keyboard is now being scanned. 2026-03-22 19:48:56 -04:00
Thomas Harte 2a1d9bc8e4 Try: storage is in control register, but is not writeable. 2026-03-20 16:41:03 -04:00
Thomas Harte 3913a2c9d3 Switch comprehension of what combines to make IRQA and B. 2026-03-20 14:45:56 -04:00
Thomas Harte e098a5d08d Attempt wiring of interrupts. 2026-03-20 13:24:05 -04:00
Thomas Harte d2d635a735 Provide that some control lines might sometimes be outputs. 2026-03-20 12:58:16 -04:00
Thomas Harte aa5692e844 Communicate interrupts to the PIA. 2026-03-20 12:54:54 -04:00
Thomas Harte f5e6c35060 Establish that interrupts might happen. 2026-03-20 10:40:36 -04:00
Thomas Harte 49412da7db Establish a two-stage setup. 2026-03-20 10:32:19 -04:00
Thomas Harte bffbf8184a Confirm MO5 address wiring; add hysteresis. 2026-03-20 10:25:04 -04:00
Thomas Harte 64648a0388 Attempt a through-wiring of PIA ports. 2026-03-20 10:17:09 -04:00
Thomas Harte e77bc4790c Sketch out some basics of the PIA. 2026-03-19 21:31:09 -04:00
Thomas Harte dcd6b611d0 Start establishing more MO5 hardware. 2026-03-19 18:24:10 -04:00