1781 Commits
Author SHA1 Message Date
Thomas Harte f459ffe619 Clean up Storage.hpp and starship operators. 2026-10-20 21:33:36 -04:00
Thomas Harte bbc5c7ee14 Use <bit> for endianness decisions. 2026-10-16 21:50:17 -04:00
Thomas Harte 6b160810b1 Use more rational std::memory_order::. 2026-10-06 22:59:25 -04:00
Thomas Harte 9bdee00047 Increase debugging information logged. 2026-07-16 17:21:35 -04:00
Thomas Harte 75a009d903 Resolve line lengths; use prefix operators. 2026-07-16 14:01:16 -04:00
Thomas Harte 51d917c4c2 Reduce indentation. 2026-07-16 13:38:50 -04:00
Thomas Harte c50afffd5d Support CoCo soft reset. 2026-05-26 13:52:41 -04:00
Thomas Harte 5590ef1397 Improve ActionRange. 2026-05-24 21:29:23 -04:00
Thomas Harte 9710947c31 Experiment with a less-repetitive formulation. 2026-05-24 12:10:18 -04:00
Thomas Harte da2cd8096c Add 6847 border colours. 2026-05-24 11:53:18 -04:00
Thomas Harte c50d4366eb Trim printf arguments. 2026-05-23 07:09:45 -04:00
Thomas Harte add991b10c Don't exit CRC check due to other event. 2026-05-22 22:46:55 -04:00
Thomas Harte faf4f237bb Relocate responsibility for NMI/HALT tracking. 2026-05-22 22:02:43 -04:00
Thomas Harte b03db5fdf9 Attach NMI and HALT. 2026-05-19 16:32:43 -04:00
Thomas Harte 25c36047d1 Unify selection of constant. 2026-05-14 11:04:17 -04:00
Thomas Harte f5fcfa710c Extend the hsync signal through to the end of the back porch. 2026-05-14 10:28:57 -04:00
Thomas Harte 0b644c7b7a Specialise bit 6 inversion logic to the internal ROM. 2026-05-13 22:53:37 -04:00
Thomas Harte 7c86eb7b90 Fix ordering of resolution 0 colours. 2026-05-13 22:51:05 -04:00
Thomas Harte c48755ce93 Reverse colour list for semigraphics. 2026-05-13 22:32:56 -04:00
Thomas Harte 0e84604bdb Fix CSS selection, effect. 2026-05-13 22:09:59 -04:00
Thomas Harte 92467b02da Change 6821 interrupt clearing condition: must read data register. 2026-05-13 17:41:01 -04:00
Thomas Harte 2f7146d0d7 Switch PIA input to field sync. 2026-05-13 13:25:25 -04:00
Thomas Harte 85662b0268 Ensure ranges are non-overlapping. 2026-05-13 13:14:37 -04:00
Thomas Harte 7a7bd43499 Reset row if exiting graphics mode. 2026-05-13 10:51:17 -04:00
Thomas Harte 47104dbf86 Add border fetches, rearrange SAM logic. 2026-05-13 10:42:29 -04:00
Thomas Harte c10cabd2b3 Start implementing SAM address calculation. 2026-05-13 10:08:07 -04:00
Thomas Harte f54eb15764 Further reduce runtime parameters. 2026-05-12 21:52:15 -04:00
Thomas Harte f7ad403a8a Reverse colours in text modes. 2026-05-12 17:54:03 -04:00
Thomas Harte 43bed7406d Field sync runs from end of display to end of sync. 2026-05-12 15:27:10 -04:00
Thomas Harte 8b1c1e9c7a Add TODO. 2026-05-12 15:09:23 -04:00
Thomas Harte 0fb2490af5 As implemented, the delegate need not be dynamic. 2026-05-12 15:03:30 -04:00
Thomas Harte 9ec7e39874 Add delegate call-outs. 2026-05-12 14:53:52 -04:00
Thomas Harte 91ec4012b9 Don't impose NTSC colour bursts on PAL. 2026-05-12 14:07:10 -04:00
Thomas Harte f7bf10698c Switch 'colour' palettes. 2026-05-12 12:32:07 -04:00
Thomas Harte c55bccb215 Attempt full accounting for 6847 modes. 2026-05-12 12:25:12 -04:00
Thomas Harte c2e7e2f796 Apply MSB to semigraphics connection. 2026-05-12 11:34:23 -04:00
Thomas Harte 72fbd34ba3 Adjust means of mode capture. 2026-05-12 11:28:33 -04:00
Thomas Harte 716f06b1f2 Tweak colour-burst phase. 2026-05-07 15:07:12 -04:00
Thomas Harte ef494af270 Do _something_ for pixel modes. 2026-05-07 14:41:15 -04:00
Thomas Harte 779b370796 Make 6847 just-in-time; wire through IRQs. 2026-05-06 17:31:03 -04:00
Thomas Harte 276238895e Implement next_sequence_point. 2026-05-06 17:14:16 -04:00
Thomas Harte 60f79720f2 Start clarifying interface. 2026-05-06 17:05:34 -04:00
Thomas Harte 197a79192d Expose h/vsync getters. 2026-05-06 16:27:03 -04:00
Thomas Harte 05f0f4fbdf Add TODOs on remaining work. 2026-05-06 14:44:12 -04:00
Thomas Harte c60e19eadd Wire 6847 accesses through SAM. 2026-05-06 14:38:11 -04:00
Thomas Harte e71504f298 Configure address generation as per mode. 2026-05-06 14:32:54 -04:00
Thomas Harte f9d25b5f93 Fix to post hoc address increment. 2026-05-06 12:41:36 -04:00
Thomas Harte e51cdd14b2 On further reading: the 6883 and 6847 use different address logic. 2026-05-06 12:05:25 -04:00
Thomas Harte 1d3c4ca51a Include a colour burst. 2026-05-05 21:40:32 -04:00
Thomas Harte 3798153ceb Implement probably-correct line timings. 2026-05-05 21:32:58 -04:00