6502/CLK
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mirror of https://github.com/TomHarte/CLK.git synced 2026-10-24 03:02:19 +00:00
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11 Commits
Author SHA1 Message Date
Thomas Harte 6b160810b1 Use more rational std::memory_order::. 2026-10-06 22:59:25 -04:00
Thomas Harte 205e21ba21 Avoid synchronisation issues on inputs_. 2026-02-18 13:18:24 -05:00
Thomas Harte a8325b6bce Add BBC joysticks. 2025-10-02 17:10:27 -04:00
Thomas Harte fb5ef200fb Correct uPD7002 interrupt wiring. 2025-09-20 21:51:19 -04:00
Thomas Harte 719a090b34 Retain bit 2. 2025-09-20 20:06:28 -04:00
Thomas Harte 3af85da6e0 Adjust conversion bits in status. 2025-09-20 19:52:47 -04:00
Thomas Harte 8fd62aa525 Disable interrupt at start of conversion. 2025-09-20 19:49:16 -04:00
Thomas Harte 421bf28582 Add comments, correct address decoding. 2025-09-18 12:27:13 -04:00
Thomas Harte 4c49ffe3d1 Attmept full ADC implementation. 2025-09-18 12:21:25 -04:00
Thomas Harte 26b1ef247b Add calls to ADB. 2025-09-17 23:11:48 -04:00
Thomas Harte ae774e88fa Add header for ADC. 2025-09-17 21:42:42 -04:00