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Code Issues Projects Releases Wiki Activity
10,610 Commits 8 Branches 121 Tags 496 MiB
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115 Commits

Author SHA1 Message Date
Thomas Harte
f45d8bcbdb Implement RCR. 2023-10-13 21:44:48 -04:00
Thomas Harte
6f7991f54a Avoid loop. 2023-10-13 21:32:35 -04:00
Thomas Harte
6ec291d96f Move ownership of mask test. 2023-10-13 15:34:06 -04:00
Thomas Harte
1a0f848b21 Implement RCL. 2023-10-13 14:44:22 -04:00
Thomas Harte
bf832768e6 Implement XLAT. 2023-10-12 21:12:03 -04:00
Thomas Harte
d35377c776 Implement SALC, SETMO, SETMOC. 2023-10-12 15:52:05 -04:00
Thomas Harte
97d3a9fa78 Implement MOV. 2023-10-12 15:34:46 -04:00
Thomas Harte
da029ee344 Implement LEA. 2023-10-12 14:31:25 -04:00
Thomas Harte
cf846f501a Implement LDS, LES. 2023-10-12 14:24:28 -04:00
Thomas Harte
e948a67814 Implement SAHF, LAHF. 2023-10-12 13:54:51 -04:00
Thomas Harte
56e639e09a Add INT (including INT3), INTO. 2023-10-11 16:01:09 -04:00
Thomas Harte
e75ef70c96 Further generalise. 2023-10-11 15:08:04 -04:00
Thomas Harte
a768b101f8 Further clean up copy-and-paste mess. 2023-10-11 14:36:42 -04:00
Thomas Harte
7159366360 Collapse all flags accesses behind setters and getters. 2023-10-11 12:35:17 -04:00
Thomas Harte
033ba75376 Standardise repetitive sign/zero/parity sets. 2023-10-11 11:15:59 -04:00
Thomas Harte
fbd647080d Start factoring out useful ALU stuff. 2023-10-11 11:06:20 -04:00
Thomas Harte
4a803e2d43 Reduce ADD/ADC/SUB/SBB repetition. 2023-10-10 22:43:06 -04:00
Thomas Harte
7753497a93 Add header for std::swap. 2023-10-10 22:35:25 -04:00
Thomas Harte
a83b43a1ae Implement XCHG. 2023-10-10 22:34:42 -04:00
Thomas Harte
5125907048 Implement TEST. 2023-10-10 22:28:10 -04:00
Thomas Harte
08867f4970 Implement CMP. 2023-10-10 22:15:33 -04:00
Thomas Harte
d0a9b5cb81 Implement NEG, NOT. 2023-10-10 22:09:10 -04:00
Thomas Harte
0ecc319ee6 Add OR, XOR. 2023-10-10 17:12:06 -04:00
Thomas Harte
de95026076 Implement Jcc. 2023-10-10 16:27:06 -04:00
Thomas Harte
f083eab011 Implement INC, DEC. 2023-10-10 15:57:33 -04:00
Thomas Harte
dbf7d07609 Add DIV, faulty IDIV. 2023-10-10 10:34:18 -04:00
Thomas Harte
0412890923 Add STC, STD, STI. 2023-10-09 22:16:37 -04:00
Thomas Harte
5e830781cc Implement IMUL, improve test memory footprint. 2023-10-09 22:12:15 -04:00
Thomas Harte
ff6573dd02 Implement MUL. 2023-10-09 21:50:17 -04:00
Thomas Harte
e46e42d896 This is the same test either way around. 2023-10-09 16:47:02 -04:00
Thomas Harte
1cb26cb141 Pull add/sub distinction into templates. 2023-10-09 16:40:50 -04:00
Thomas Harte
f74ca8aee1 Fix SBB. 2023-10-09 16:32:01 -04:00
Thomas Harte
58aa1da649 Fix SUB. SBB still failing. 2023-10-09 16:30:47 -04:00
Thomas Harte
67d364cc89 Add faulty SUB, SBB. 2023-10-09 16:21:04 -04:00
Thomas Harte
d24fa381c7 'Implement' ESC, NOP. 2023-10-09 15:03:01 -04:00
Thomas Harte
fe6e2eb0a1 Generalise CBW. 2023-10-09 15:00:04 -04:00
Thomas Harte
08aed3bac5 Implement CWD. 2023-10-09 14:54:14 -04:00
Thomas Harte
6bbd896c34 Add DAS with a manageable number of failures. 2023-10-09 14:47:39 -04:00
Thomas Harte
0bf2099a70 Improve DAA. 2023-10-09 14:42:32 -04:00
Thomas Harte
1b9e6e8c8e Add DAA, which doesn't yet pass all tests. 2023-10-09 14:27:02 -04:00
Thomas Harte
59521f9d38 Implement CBW, CLC, CLD, CLI, CMC. 2023-10-09 11:59:38 -04:00
Thomas Harte
769aed10ea Reduce repetition. 2023-10-09 11:49:38 -04:00
Thomas Harte
5a77f0c93c Implement CALL. 2023-10-09 11:46:59 -04:00
Thomas Harte
4f14210ee0 Remove ideas discarded. 2023-10-08 22:27:01 -04:00
Thomas Harte
f618ca6046 Implement, test AND. 2023-10-08 22:18:40 -04:00
Thomas Harte
e3b18708c7 Handle segment-boundary word accesses. 
With all ADDs and ADCs enabled, no remaining failures.
 2023-10-08 22:11:05 -04:00
Thomas Harte
bd0b62232f Consider that displacements may always be signed. 
Down to 1 failure.
 2023-10-08 21:41:36 -04:00
Thomas Harte
dbfaef632a Fix DataPointer reference. 
Down from 4521 to 1248 failures within 00.json.gz
 2023-10-08 15:59:30 -04:00
Thomas Harte
0d2af80f7f Avoid access issues if there's no index. 2023-10-08 13:50:36 -04:00
Thomas Harte
6f768d9a3d Start climbing towards address resolution. 2023-10-08 13:47:43 -04:00
Thomas Harte
dd3cc1f510 Fix ADD and ADC sign flags. 2023-10-08 13:39:46 -04:00
Thomas Harte
a4b1d2b00a Float out data resolution. 2023-10-08 13:34:28 -04:00
Thomas Harte
b6d000ac5e Add enough wiring to consolidate failure on lazy handling of flags. 2023-10-06 13:22:35 -04:00
Thomas Harte
82f0cd790f Find first failing execution, note reason. 2023-10-06 11:43:18 -04:00
Thomas Harte
2d17d9d316 Execute some tests at some facile level. 2023-10-06 11:31:45 -04:00
Thomas Harte
a0ca0bb3c0 Mark non-templates as inline. 2023-10-06 11:11:29 -04:00
Thomas Harte
c6b311b84a Explain source of comments. 2023-10-06 11:10:54 -04:00
Thomas Harte
28c7d27cac Establish some proportion of state, ready to execute _something_. 2023-10-06 11:07:33 -04:00
Thomas Harte
6d392852d2 Hack on through to something that builds. 2023-10-05 22:27:52 -04:00
Thomas Harte
f411a961a3 Create a central location for avoiding segment conditionality. 2023-10-05 17:12:38 -04:00
Thomas Harte
ada411c0d8 It's differing mildly from DataPointResolver, but segue towards a world of real data. 2023-10-05 17:06:00 -04:00
Thomas Harte
eb100e3b29 Start reforming; data size plus register aren't independent in finding a source. 2023-10-05 16:49:02 -04:00
Thomas Harte
15acb1fc7c Add ADC and ADD. 2023-10-05 15:49:07 -04:00
Thomas Harte
09b2cfad8a Add AAM and AAS. 2023-10-05 14:52:24 -04:00
Thomas Harte
059f300500 Start fleshing out x86 performance. 2023-10-05 14:37:58 -04:00