Thomas Harte
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2332f72875
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Formalised clock-rate multiplication within disk drives, discovered that the stepper didn't have ideal behaviour for my timed event loop and hence nailed down the semantics a ilttle more.
(obiter: the 1540 now appears to discern the correct sequence of bits. Framing is off in my test printfs but that's neither here nor there).
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2016-07-31 13:32:30 -04:00 |
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Thomas Harte
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8f62211f5e
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Wired up the 1540 as a PLL delegate. Which prima facie means it should start receiving a bit stream. Except that I clearly have something in the timing way off — either my flux transitions are far too short or I need to significantly increase the clock rate on the PLL.
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2016-07-29 12:08:18 -04:00 |
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Thomas Harte
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89a1881fef
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Started turning the 1540 into an actual disk drive.
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2016-07-29 11:03:09 -04:00 |
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Thomas Harte
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ada2f073e0
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Completed handing of the disk all the way to the 1540.
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2016-07-10 16:24:46 -04:00 |
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Thomas Harte
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6cfc514c2d
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Made the rote changes necessary to attempt to open and to supply a G64 to the Vic.
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2016-07-10 12:57:17 -04:00 |
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Thomas Harte
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4ca6883f7c
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Disabled attachment of a 1540 again, as I probably need to move to opening an actual disk image next.
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2016-07-10 08:03:36 -04:00 |
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Thomas Harte
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824d9ea92b
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Added further comments.
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2016-07-10 08:01:16 -04:00 |
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Thomas Harte
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d8334edf4a
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Started trying to clean up, including commuting the C1540 source file name to match its class name but mainly by adding documentation.
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2016-07-10 07:46:20 -04:00 |
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Thomas Harte
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c0ab45a73d
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Disabled a bunch of the caveman debug logging.
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2016-07-09 22:29:11 -04:00 |
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Thomas Harte
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f589d639db
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Okay, so it seems that sync also works the other way around.
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2016-07-09 22:25:44 -04:00 |
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Thomas Harte
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693c8b2438
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After all that, it seems likely that inputs just aren't inverted for the Vic.
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2016-07-09 20:03:38 -04:00 |
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Thomas Harte
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656cd211d7
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Was transmitting bit levels backwards (probably?); 1540 now acknowledges byte received.
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2016-07-09 18:06:49 -04:00 |
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Thomas Harte
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7cc4bf3fe7
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Hit and hope is getting me nowhere. Time to unit test this thing.
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2016-07-09 15:40:25 -04:00 |
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Thomas Harte
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8827597363
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Messier and messier, but I've at least attempted to implement hardware attention acknowledge.
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2016-07-08 19:00:39 -04:00 |
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Thomas Harte
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9a08ef61cb
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Still fumbling in the margins: made an effort not to imply that the 1540 is forever reading syncs.
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2016-07-07 22:13:18 -04:00 |
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Thomas Harte
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199c0e27e0
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Mostly just random guesses now, to be honest. It's approaching the end of my window for the morning.
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2016-07-07 07:16:36 -04:00 |
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Thomas Harte
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81e6cc34e5
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Per the ROM disassembly, the Vic's VIA outputs are inverted for the benefit of the serial bus.
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2016-07-07 06:57:21 -04:00 |
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Thomas Harte
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c9479f923b
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The inversion of truth was clearly just a problematic API. Got explicit. LineLevel might need to become more pervasive.
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2016-07-07 06:44:13 -04:00 |
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Thomas Harte
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dcb86a027a
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Okay, so the 1540 doesn't toggle the actual attention line. I don't know what it does yet but this helps.
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2016-07-06 22:31:14 -04:00 |
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Thomas Harte
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1baf21827c
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Since the ROM is well disassembled, let's actually try to be a 1541 first.
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2016-07-06 22:17:32 -04:00 |
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Thomas Harte
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4f174786b5
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Fixed potential buffer overrun.
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2016-07-06 21:39:09 -04:00 |
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Thomas Harte
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f64cd8cfcb
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Quick fixes properly to declare the DriveVIA, to ensure its interrupts take effect, and to wire ATN IN to CA1 rather than CB2.
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2016-07-06 20:22:46 -04:00 |
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Thomas Harte
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428fcdb978
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Centralised and improved serial logging.
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2016-07-06 07:46:21 -04:00 |
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Thomas Harte
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8819711bc8
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Threw in the second VIA as a currently clearly incorrect thing.
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2016-07-05 22:22:09 -04:00 |
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Thomas Harte
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93c2bb80a2
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Improved a comment, added independent C[A/B]2 input mode.
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2016-07-05 21:11:51 -04:00 |
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Thomas Harte
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6c4fa4ec5d
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Improved commenting and initial state communication.
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2016-07-05 20:57:31 -04:00 |
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Thomas Harte
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1e6d90de17
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Made an attempt properly to deal with initial bus state.
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2016-07-05 20:52:33 -04:00 |
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Thomas Harte
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c3b7d24293
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It appears that the attention line is also wired to CB2. So the ball is back in the 6522's court.
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2016-07-05 19:19:46 -04:00 |
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Thomas Harte
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11fc43aa04
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Made an attempt to allow the 1540 to talk back to the Vic, and to receive interrupts. Also slightly disambiguated debugging logging.
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2016-07-05 19:12:43 -04:00 |
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Thomas Harte
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d16b79073e
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Further fleshing out: added a serial port for the serial bus.
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2016-07-05 17:27:02 -04:00 |
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Thomas Harte
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d1eea6943d
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Ensured the 1540 ROM gets installed, at least.
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2016-07-05 16:54:25 -04:00 |
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Thomas Harte
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86dabd007b
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Furthered fleshing out of the 1540. Though it doesn't yet receive a ROM so won't even attempt to do anything meaningful.
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2016-07-05 16:39:18 -04:00 |
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Thomas Harte
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a25fcc7190
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Made a first attempt at wiring back serial port input.
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2016-07-05 16:10:54 -04:00 |
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Thomas Harte
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d2cded7b59
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Attempted to separate out the concept of a serial port and a serial bus, since the bus may be shared, and to establish half duplex communications from the Vic.
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2016-07-05 14:55:20 -04:00 |
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Thomas Harte
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0d3d0fbe4d
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Created a namespace for Commodore and an empty container file for the 1540[/1] implementation.
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2016-07-05 13:28:27 -04:00 |
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Thomas Harte
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97751a9d86
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Took the preliminary steps necessary to wire up a serial port.
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2016-07-05 10:55:47 -04:00 |
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Thomas Harte
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a49f2b41cc
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Added C++ side of things. I think.
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2016-07-04 21:48:25 -04:00 |
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Thomas Harte
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8db44eed3e
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Added a default implementation of Speaker::skip_samples .
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2016-07-04 20:48:27 -04:00 |
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Thomas Harte
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bfa237397d
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Settled on assigning to nullptr as the appropriate style for emptying shared_ptrs; fixed the Vic properly to release its output resources.
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2016-07-04 20:34:11 -04:00 |
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Thomas Harte
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88964ceac0
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Eliminated plain pointer passing for object types.
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2016-07-04 19:33:55 -04:00 |
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Thomas Harte
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82b0bc9b58
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Discovered that this is another meaningful usage of using .
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2016-07-04 19:10:10 -04:00 |
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Thomas Harte
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7e5b631e30
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Cut some dead code.
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2016-07-01 19:02:29 -04:00 |
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Thomas Harte
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7fa010a463
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Attempted to add support for the most basic of control line output, and slightly to optimise the Vic.
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2016-07-01 19:01:22 -04:00 |
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Thomas Harte
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ed8f4d0476
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Added some minor additional bits of documentation.
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2016-06-30 08:46:29 -04:00 |
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Thomas Harte
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0182b0483a
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Added a 'power on' flag that is set automatically at construction but can be declined. Saves all that stuff of every machine having to set and then unset the RST line, and fixes an Electron bug related to that.
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2016-06-29 19:13:24 -04:00 |
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Thomas Harte
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6027cba95f
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Factored out the stuff of pushing a fast-loading option onwards and storing it within the user defaults.
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2016-06-27 21:38:14 -04:00 |
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Thomas Harte
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e3e6bbb785
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Removed the colon again, until I can educate myself a little further.
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2016-06-26 21:38:03 -04:00 |
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Thomas Harte
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69d78dfdb3
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Removed logging.
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2016-06-26 21:36:26 -04:00 |
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Thomas Harte
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1439ca0580
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Added a quick automatic issuing of the 'LOAD' command.
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2016-06-26 21:34:37 -04:00 |
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Thomas Harte
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843d1fdca7
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Added some extra logging while trying to determine what's going on; added interrupt clearing for the control lines.
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2016-06-26 21:30:06 -04:00 |
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