Thomas Harte
6990abc0d3
Tweaks selected output mode when both BPP bits are set.
2019-11-18 22:56:40 -05:00
Thomas Harte
ade8df7217
Permits a delay on DE propagation back to the CPU. Plus tests.
...
Currently set at 28 cycles, but I don't know.
2019-11-18 22:12:24 -05:00
Thomas Harte
1202b0a65f
Establishes a pipeline for delayed public state visibility.
2019-11-17 23:28:00 -05:00
Thomas Harte
facc0a1976
Amps up the documentation.
2019-11-17 21:28:51 -05:00
Thomas Harte
253dd84109
Corrects accidental dropping of pixel residue.
...
Specific issue: the repeated (start_column != end_column) test, which can no longer be correct if start_column has been incremented in the (x_&7) test.
The visible effect was to omit pixels from the output wave, which also affected observed sync timing.
2019-11-17 18:34:13 -05:00
Thomas Harte
6a82c87320
Withdraws border optimisation temporarily; I think I may be onto an output bug here.
2019-11-12 19:33:13 -05:00
Thomas Harte
f0478225f0
Adjusts logic to reduce number of output spans.
2019-11-12 19:30:28 -05:00
Thomas Harte
ab34fad8ca
Introduces a cleaner, separated shifter.
2019-11-10 21:39:40 -05:00
Thomas Harte
77ef7dc8fc
Shuffles ST and 2600 into a common parent.
2019-11-09 15:31:41 -05:00