Thomas Harte
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3b398f7a9a
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Attempts to complete all 65816 bus signalling.
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2020-10-16 21:56:20 -04:00 |
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Thomas Harte
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096add7551
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Exposes non-BusOperation bus outputs.
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2020-10-16 21:05:42 -04:00 |
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Thomas Harte
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334e0666b7
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Reports ::Ready upon a WAI.
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2020-10-15 21:37:37 -04:00 |
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Thomas Harte
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98c81749c8
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Adds the conventional flush.
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2020-10-15 21:36:04 -04:00 |
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Thomas Harte
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9c0c0255f6
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Ensures data/program bank can't accidentally be set to 16-bit values.
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2020-10-15 21:10:32 -04:00 |
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Thomas Harte
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68c15bd605
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Updates Qt project; catches another couple of issues via its compiler.
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2020-10-15 21:09:22 -04:00 |
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Thomas Harte
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7aa6cf4c6b
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Tidies up layout very slightly.
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2020-10-15 20:51:23 -04:00 |
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Thomas Harte
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dfda2adf0d
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Attempts implementations of both ready and abort.
Which I think concludes the inputs?
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2020-10-15 20:46:18 -04:00 |
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Thomas Harte
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c0a1c34012
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Wraps all registers into a struct, so that I can implement abort.
Makes some preparations for ready too.
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2020-10-15 18:42:38 -04:00 |
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Thomas Harte
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3c6adc1ff4
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Completes 65816 addressing mode tests and corresponding fixes.
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2020-10-14 22:00:52 -04:00 |
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Thomas Harte
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e511d33a7c
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Adds test for [d], y; fixes implementation.
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2020-10-14 21:42:41 -04:00 |
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Thomas Harte
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27afb8f0a7
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Adds direct indirect long test, and thereby fixes addressing mode.
Nine to go!
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2020-10-14 21:26:20 -04:00 |
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Thomas Harte
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327ab81436
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Fills in direct, x and (direct) tests, fixing implementation of the latter.
10 to go.
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2020-10-14 21:17:28 -04:00 |
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Thomas Harte
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b22aa5d699
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Starts transcribing the addressing examples I have into tests.
Correspondingly extends the exposed register set and test-machine addressing range.
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2020-10-13 21:38:30 -04:00 |
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Thomas Harte
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3e6a2adaaf
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Corrects absolute, x and absolute, y addressing modes.
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2020-10-13 20:30:39 -04:00 |
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Thomas Harte
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8f5537aaaa
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Attempts to resolve my direct-indirect addressing stumble.
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2020-10-13 20:21:53 -04:00 |
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Thomas Harte
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a15d4a156b
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Starts trying to ensure appropriate address wrapping.
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2020-10-12 22:33:43 -04:00 |
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Thomas Harte
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7479dc74ed
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Removes printf. It's no longer telling me anything.
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2020-10-12 21:52:58 -04:00 |
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Thomas Harte
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28da1a724a
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Introduces Jeek816 test case.
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2020-10-12 21:43:44 -04:00 |
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Thomas Harte
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f529eadbec
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Corrects 16-bit read-modify-write.
Subject to the TODO proviso on 'correct'; has my 6502 prejudice pushed me into unrealistic bus signalling?
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2020-10-12 18:36:09 -04:00 |
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Thomas Harte
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5dc3cd3a2f
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Starts using Jeek816 for a basic native-mode audit. Fixes absolute long addressing.
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2020-10-11 22:02:46 -04:00 |
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Thomas Harte
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82797fd395
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Attempts to do the proper thing for interrupts.
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2020-10-11 21:10:44 -04:00 |
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Thomas Harte
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a0885ab7d0
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Implements STP and WAI.
Albeit still without fully-implemented reactions to exceptions in general.
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2020-10-11 17:56:55 -04:00 |
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Thomas Harte
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8eaf1303a3
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Attempts proactively to ensure proper RTI behaviour on the 65816.
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2020-10-11 15:25:13 -04:00 |
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Thomas Harte
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20cbe72985
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Ties to 8- or 16-bit those instructions that aren't M/X-dependent.
This is technically redundant for PEI, PEA and PER since they have dedicated bus programs anyway, but it's good to be explicit.
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2020-10-11 14:38:35 -04:00 |
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Thomas Harte
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071ad6b767
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I don't think RTL is needed; JML looks like it covers it.
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2020-10-10 22:16:35 -04:00 |
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Thomas Harte
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0619e49eac
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Takes a short at TSB and TRB.
Three to go.
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2020-10-10 22:00:17 -04:00 |
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Thomas Harte
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b8848d8580
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Implements TCD, TDC, TCS, TSC.
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2020-10-10 21:43:05 -04:00 |
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Thomas Harte
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aface1f8be
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Implements XBA and XCE.
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2020-10-10 21:34:22 -04:00 |
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Thomas Harte
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ae87728770
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Ensures M and X are exposed to the public interface.
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2020-10-10 21:33:56 -04:00 |
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Thomas Harte
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28c8ba70c1
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Implements REP and SEP and exposes the MX flags generally.
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2020-10-10 21:23:59 -04:00 |
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Thomas Harte
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6892ac13e8
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Corrects BIT. All 65816-applicable Wolfgang Lorenz tests now pass.
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2020-10-10 17:47:33 -04:00 |
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Thomas Harte
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0fe09cd1e4
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Knocks SBC into producing likely results; disables Lorenz testing.
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2020-10-10 17:13:16 -04:00 |
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Thomas Harte
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da4702851f
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Fixes ADC.
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2020-10-10 16:29:48 -04:00 |
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Thomas Harte
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d17c90edf7
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Corrects ROL d, x.
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2020-10-10 11:25:14 -04:00 |
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Thomas Harte
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7966592fae
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Corrects ROL d.
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2020-10-10 11:22:23 -04:00 |
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Thomas Harte
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6efe4e1753
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Fixes AND, EOR, ORA. Takes an unsuccessful shot at ROL.
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2020-10-10 10:53:17 -04:00 |
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Thomas Harte
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536c4d45c1
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Adds additional 65816 tests, some failing; seeks to improve carry behaviour in ASL and ROL.
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2020-10-10 10:11:57 -04:00 |
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Thomas Harte
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290598429a
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Applies indirect page zero emulation mode addressing constraint to ix addressing.
Lorenz's LDA tests now pass in emulation mode.
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2020-10-09 23:22:48 -04:00 |
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Thomas Harte
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92e72959c3
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Makes corrections to ix addressing mode and shift/roll flags.
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2020-10-09 23:12:20 -04:00 |
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Thomas Harte
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c01bc784b9
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Slightly reduces branching.
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2020-10-09 22:21:55 -04:00 |
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Thomas Harte
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abcd86a294
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Fixes accumulator instructions.
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2020-10-09 22:18:22 -04:00 |
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Thomas Harte
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451f83ba51
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Corrects emulation-mode read-modify-writes not to empty the data buffer.
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2020-10-09 22:14:42 -04:00 |
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Thomas Harte
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b439f40fe2
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Corrects INC and DEC.
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2020-10-09 22:04:25 -04:00 |
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Thomas Harte
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968166b06d
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Resolves incorrectly flow after setting up an absolute address.
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2020-10-09 21:48:35 -04:00 |
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Thomas Harte
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0ed98cbfac
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Attempts to fix direct indirect indexed; not yet successful I think.
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2020-10-08 22:15:19 -04:00 |
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Thomas Harte
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7dde7cc743
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Implements altered direct indexed addressing in emulation mode.
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2020-10-08 22:02:14 -04:00 |
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Thomas Harte
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755627f12d
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Corrects direct addressing.
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2020-10-08 20:00:01 -04:00 |
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Thomas Harte
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f8004d7096
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Implements RTI, corrects TAY.
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2020-10-08 18:06:11 -04:00 |
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Thomas Harte
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0418f51ef2
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Takes a shot at emulation-mode 'exceptions'.
It's just RTI and correct decimal SBC left of the official 6502s now, I think.
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2020-10-08 17:52:13 -04:00 |
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