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Author	SHA1	Message	Date
Thomas Harte	4e7963ee81	Clarify PC semantics; remove faulty underscore.	2024-03-03 14:11:02 -05:00
Thomas Harte	945b7e90da	Add just enough to persuade self that execution is broadly sane.	2024-03-03 14:03:08 -05:00
Thomas Harte	99f0233b76	Fix immediate offset and data processing operation.	2024-03-02 23:27:37 -05:00
Thomas Harte	62da0dee7f	Unify reads.	2024-03-02 23:15:17 -05:00
Thomas Harte	1663d3d9d1	Introduce disaster of an attempted test run.	2024-03-02 22:40:12 -05:00
Thomas Harte	37499d493a	Fix model name.	2024-03-02 21:47:09 -05:00
Thomas Harte	c0dd96eb7c	Add a catalogue entry for RISC OS.	2024-03-02 21:44:27 -05:00
Thomas Harte	2abae4c8bf	Merge pull request #1349 from TomHarte/BarrelShifterTests ... Introduce barrel-shifter tests.	2024-03-02 15:24:06 -05:00
Thomas Harte	c865da67e0	Introduce further barrel-shifter tests.	2024-03-02 15:12:03 -05:00
Thomas Harte	e6f77a9b80	Add logical right-shift tests.	2024-03-01 18:06:54 -05:00
Thomas Harte	7b28b3d634	Merge pull request #1343 from TomHarte/ARM2Ops ... Attempt an implementation of the ARM2 instruction set.	2024-03-01 15:20:28 -05:00
Thomas Harte	42ba6d1281	Relocate execution code appropriately.	2024-03-01 15:02:47 -05:00
Thomas Harte	85b7afd530	Attempt a complete block data transfer.	2024-03-01 14:48:36 -05:00
Thomas Harte	f2f59a4de5	Attempt to deal with data aborts.	2024-03-01 10:38:08 -05:00
Thomas Harte	5759798ad7	Deal with downward write order.	2024-02-29 14:34:20 -05:00
Thomas Harte	ab1dd7f57e	Implement a little of block data transfer.	2024-02-29 11:33:40 -05:00
Thomas Harte	53a2ea3a57	Add address exception.	2024-02-29 10:49:11 -05:00
Thomas Harte	1f1e7236be	Add rotation.	2024-02-29 10:47:41 -05:00
Thomas Harte	fd2c5b6679	Make a quick first attempt at memory accesses.	2024-02-29 10:18:09 -05:00
Thomas Harte	0b287c55d5	Edge towards single data transfer.	2024-02-29 10:02:57 -05:00
Thomas Harte	0de8240238	Merge branch 'master' into ARM2Ops	2024-02-28 22:21:31 -05:00
Thomas Harte	1449b2a2a6	Merge pull request #1347 from TomHarte/AppleIIFlashRate ... Double Apple II flash rate.	2024-02-28 22:21:05 -05:00
Thomas Harte	0f691766ee	Double flash rate.	2024-02-28 22:13:22 -05:00
Thomas Harte	3ce05e9de1	Merge pull request #1346 from TomHarte/AppleIIReset ... Propagate reset to the auxiliary switches.	2024-02-28 22:02:08 -05:00
Thomas Harte	98f5d0cdb7	Propagate reset to the auxiliary switches.	2024-02-28 21:36:55 -05:00
Thomas Harte	93b4008f81	Localise flags, detect improper carry write.	2024-02-28 21:28:19 -05:00
Thomas Harte	904462b881	Regularise data transfers.	2024-02-28 21:23:57 -05:00
Thomas Harte	3b320bcdef	Update coprocessor interface.	2024-02-28 14:43:31 -05:00
Thomas Harte	3368bdb99f	Document exceptions, partly for my future self.	2024-02-28 14:34:31 -05:00
Thomas Harte	4d400c3cb7	Add easy exceptions.	2024-02-28 14:25:12 -05:00
Thomas Harte	474f9da3c2	Add banked registers.	2024-02-28 14:09:05 -05:00
Thomas Harte	c49b26701f	Relocate and clarify barrel shifts. ... With a view to independent testing.	2024-02-28 13:53:13 -05:00
Thomas Harte	9b42d35d56	Update interface.	2024-02-28 11:42:33 -05:00
Thomas Harte	645152a1fd	Implement branch.	2024-02-28 11:33:28 -05:00
Thomas Harte	487ade56ed	Add basic multiply.	2024-02-28 11:27:27 -05:00
Thomas Harte	60d1b36e9a	Implement registers side.	2024-02-28 10:25:14 -05:00
Thomas Harte	5a48c15e46	Add scheduler side of PC writeback.	2024-02-28 10:15:23 -05:00
Thomas Harte	d6bf1808f9	Take a swing at PC-as-input.	2024-02-28 09:33:05 -05:00
Thomas Harte	b676153d21	State intention to merge status with other registers.	2024-02-27 15:36:34 -05:00
Thomas Harte	a3339cf882	Fix indentation.	2024-02-27 15:30:51 -05:00
Thomas Harte	b4e0b46bac	Add notes on R15.	2024-02-27 10:04:30 -05:00
Thomas Harte	09c1b2d7db	Add missing shifts.	2024-02-27 09:55:24 -05:00
Thomas Harte	4255283e33	Deal with conditionality up front.	2024-02-26 21:36:23 -05:00
Thomas Harte	16e827bb2c	Add basic arithmetics.	2024-02-26 21:27:58 -05:00
Thomas Harte	def69ce6d5	Add notes on R15.	2024-02-26 15:12:39 -05:00
Thomas Harte	054a799699	Fill in the easy 50% of operations.	2024-02-26 15:10:00 -05:00
Thomas Harte	580f402bb6	Muddle further towards data processing.	2024-02-26 14:50:45 -05:00
Thomas Harte	030dda34f0	Start poking at implementation.	2024-02-26 14:30:26 -05:00
Thomas Harte	cd21b39f44	Merge pull request #1342 from TomHarte/ARM2Status ... Add some degree of ARM 2 status flags.	2024-02-26 10:48:24 -05:00
Thomas Harte	481b6d0e69	Sketch out some status flags.	2024-02-25 22:01:51 -05:00