Thomas Harte
e698cbf092
Silence debugging information.
2022-03-13 12:48:05 -04:00
Thomas Harte
f2ce646d8d
Undo 8-cycle-if-met WAIT.
2022-03-13 12:47:48 -04:00
Thomas Harte
acba357df6
Adds empty callouts for all serial port registers.
2021-12-23 15:22:20 -05:00
Thomas Harte
a17c192a9e
Allow chip RAM size selection, while I'm here.
2021-12-22 15:30:19 -05:00
Thomas Harte
1916a9b99c
Remove stdout noise.
2021-12-22 15:22:28 -05:00
Thomas Harte
9796b308dc
Add basic implementation of fast RAM.
2021-12-22 15:17:11 -05:00
Thomas Harte
d0e3024bec
Switch to nibble-oriented lookup tables for fill mode.
2021-12-19 17:16:46 -05:00
Thomas Harte
d2ad149e56
Fill mode always runs right to left.
2021-12-19 16:43:18 -05:00
Thomas Harte
348840a2aa
It's probably a net detriment to use a template in this scenario.
2021-12-19 16:31:44 -05:00
Thomas Harte
3a719633eb
Consolidate interface; correct LOGs.
2021-12-18 19:39:41 -05:00
Thomas Harte
bd69948d37
The Copper can now skip Chipset::perform.
2021-12-18 17:53:11 -05:00
Thomas Harte
54aa211f56
Avoid infinite loops for completely undefined addresses.
2021-12-18 17:48:45 -05:00
Thomas Harte
f118891970
Breaks Chipset::perform into read and write.
...
This allows each to call the other when a read occurs of a write-only address, and vice versa.
2021-12-18 17:43:53 -05:00
Thomas Harte
dbae3fc9a5
Propagate to bitplanes immediately; fix odd/even confusion.
2021-12-18 16:37:40 -05:00
Thomas Harte
c834960bfb
Withdraw separate x-and-y guess, make MOVE lose a cycle if a sleep/wake occurs.
2021-12-12 19:18:18 -05:00
Thomas Harte
600abc55b5
Compare x and y separately, wake immediately from a sleep, log more.
2021-12-12 17:26:33 -05:00
Thomas Harte
f3ec7d54bb
Clarifies wait-for-CPU-slot semantics.
...
Big bonus: this guarantees `advance_dma`s will be called at most once per output cycle, even if they return `false`.
2021-12-09 19:17:44 -05:00
Thomas Harte
2b0415d552
Attempt to avoid off-by-one buffer reads, add modulation.
2021-12-06 19:28:40 -05:00
Thomas Harte
066e4421e8
Attempt volcntrld.
2021-12-06 06:35:08 -05:00
Thomas Harte
f02a241249
Inserts an additional reload.
2021-12-05 17:47:12 -05:00
Thomas Harte
a5fe1e4259
Largely debugs audio state machine.
...
I think I'm still missing an address reload somewhere though, and attachment doesn't actually push.
2021-12-05 15:27:35 -05:00
Thomas Harte
9b80563443
Exposes targets for modulation.
2021-12-05 06:38:55 -05:00
Thomas Harte
91b5da06e3
Perform reload on Disabled -> WaitingForDummyDMA.
2021-12-04 19:17:40 -05:00
Thomas Harte
7320f96ae7
Capture attachment flags.
2021-12-04 18:02:43 -05:00
Thomas Harte
fdf2b9cd7b
Add local data pointers.
2021-12-04 17:58:41 -05:00
Thomas Harte
bfc70a1b60
Ensure interrupt request bits always propagate.
2021-12-04 16:50:42 -05:00
Thomas Harte
aff7a93106
Move DMAFlags to Flags.hpp.
2021-12-04 08:26:28 -05:00
Thomas Harte
3b027c4593
Switch and -> or for testing transitions from ::PlayingLow.
2021-12-04 08:24:41 -05:00
Thomas Harte
42d3bdd373
Adds a begin_state template.
2021-12-04 07:20:17 -05:00
Thomas Harte
57789092c1
Keep audio fetches in bounds.
2021-12-03 07:16:21 -05:00
Thomas Harte
6bc5268cbd
Reload period counter on low -> high transition.
2021-12-02 18:43:02 -05:00
Thomas Harte
e6fe36f45c
Add buffer-length assert; add <tuple> where std::tuple_size is used.
2021-12-02 12:53:20 -05:00
Thomas Harte
06b6f85d55
Correct stereo.
2021-12-02 11:15:29 -05:00
Thomas Harte
d6f1ea50a6
Switch to slightly more straightforward presumption of no data wanted.
2021-12-02 09:41:16 -05:00
Thomas Harte
9554869886
Simplify DMA logic.
2021-12-02 09:33:02 -05:00
Thomas Harte
364059551c
Add extra notes per errata, plus bonus state code repetitions.
2021-12-02 09:30:52 -05:00
Thomas Harte
06340b1ad7
Advance DMA pointer, treat audio as signed, request data on low -> high transition.
...
There's now some audio, sometimes when there should be. But it's not correct.
2021-12-01 18:34:54 -05:00
Thomas Harte
d23511860d
Attempts audio output.
2021-12-01 06:01:58 -05:00
Thomas Harte
a8dd4660b2
Adds a pipeline for audio output.
2021-12-01 05:37:58 -05:00
Thomas Harte
eb3a0eb3c7
Attempt full implementation of collisions.
2021-11-29 18:39:33 -05:00
Thomas Harte
cd0148e0bc
Switch to a default 1mb of Chip RAM.
2021-11-29 16:55:45 -05:00
Thomas Harte
8584ee609f
Support a fetch window start on line 0.
2021-11-28 05:37:49 -05:00
Thomas Harte
373847e2b7
Avoid posting redundant key events.
2021-11-28 05:31:00 -05:00
Thomas Harte
84f7d8dfc2
Factors out pixel generation, adds HAM.
2021-11-28 05:06:30 -05:00
Thomas Harte
e057a7d0dd
Attempts to implement sprite/playfield priorities.
2021-11-27 15:03:46 -05:00
Thomas Harte
7bab15bf99
Minor copy improvements.
2021-11-27 11:38:41 -05:00
Thomas Harte
dac40630fd
Adds support for the Blitter-busy flag to WAIT and SKIP.
2021-11-27 11:36:15 -05:00
Thomas Harte
33bfa1b81c
Move BitplaneShifter adjacent to expand_bitplane_byte.
2021-11-26 18:29:09 -05:00
Thomas Harte
8fc27dc292
Moves bitplane collection and shifter out of Chipset.[h/c]pp.
2021-11-26 18:16:24 -05:00
Thomas Harte
8b38c567d2
Add missing #include for std::clamp.
2021-11-26 18:08:39 -05:00
Thomas Harte
cd53e42d79
Resolve operator precedence.
2021-11-26 18:08:10 -05:00
Thomas Harte
bea6cf2038
Move mouse and joystick into a separate file, give a common parent.
2021-11-26 17:50:47 -05:00
Thomas Harte
eca80f1425
Sprites: avoid magic constants, ensure proper DMA resumption.
2021-11-26 16:02:18 -05:00
Thomas Harte
1c0962e53c
Move sprites into their own source file.
2021-11-26 15:30:31 -05:00
Thomas Harte
4b21549ff4
Add a couple of static asserts.
2021-11-26 15:23:54 -05:00
Thomas Harte
30d7b0129b
Correct sprite ordering within pairs.
2021-11-26 11:58:50 -05:00
Thomas Harte
ce6877d6e4
Sprites: infer part of DMA state from slot, no access during blank.
...
Also sets the proper vertical blank length.
2021-11-26 09:37:52 -05:00
Thomas Harte
0ab5177637
Allow DMAState::FetchStopAndControl on y == v_stop_.
2021-11-25 14:29:12 -05:00
Thomas Harte
276cbfa505
Simplify sprite state machine.
...
This now better matches the explanation given on Page 133 of the Amiga System Programmer's Guide.
2021-11-25 14:08:55 -05:00
Thomas Harte
012084b37b
Fix exclusive fill, sizing, eliminate ECS call-ins.
...
The clock test now proceeds further, but still doesn't seem to pass.
2021-11-24 17:25:32 -05:00
Thomas Harte
a8a99f647f
Further improves framing.
2021-11-21 08:13:55 -05:00
Thomas Harte
ff68b26c44
Push HSYNC 11 slots over, to its proper position, and add a frame crop.
2021-11-20 12:39:50 -05:00
Thomas Harte
a94b4f62fd
Takes a stab at attached sprites.
2021-11-19 14:19:47 -05:00
Thomas Harte
bcc959d938
Sprites: deconflate vertical and modification flags; disarm on CTL not POS.
2021-11-19 08:03:10 -05:00
Thomas Harte
cf25d8a378
Increase logging (but leave it disabled).
2021-11-19 08:01:23 -05:00
Thomas Harte
693d46f8ea
Mask by index, not colour.
2021-11-18 05:36:38 -05:00
Thomas Harte
3496ebd1d7
Constrain sprite fetches to Chip RAM.
2021-11-17 17:49:42 -05:00
Thomas Harte
be763cf7fe
Expose joystick to the world.
2021-11-17 15:33:46 -05:00
Thomas Harte
c3b4bee210
Adds a joystick class.
2021-11-17 14:26:51 -05:00
Thomas Harte
6df0227ab1
Hacks in a basic effort at dual playfields.
2021-11-16 18:26:27 -05:00
Thomas Harte
2a3a7fa8a0
Reset will_request_interrupt.
2021-11-15 16:00:35 -05:00
Thomas Harte
50a6496399
Avoids over-greedy DMA.
2021-11-15 12:31:15 -05:00
Thomas Harte
c99dee86dd
Adds missing low -> high actions, implements more transitions.
2021-11-15 12:29:32 -05:00
Thomas Harte
0c5bb9626b
Separates state transitions and tests.
2021-11-15 05:29:28 -05:00
Thomas Harte
a9971917f5
Attempts a translation of Commodore's documentation.
2021-11-14 14:54:33 -05:00
Thomas Harte
4c62611da3
Adds enough state machine to get into the near-incomprehensible stuff on the right.
2021-11-14 10:48:50 -05:00
Thomas Harte
47f36f08fb
Switches to a synchronous audio state machine; renames advance -> advance_dma.
...
I can worry about how to just-in-time things once I better understand the hardware in general.
2021-11-13 15:53:41 -05:00
Thomas Harte
f906bab1a5
Provides feedback on interrupt flags, starts on state machine.
2021-11-13 11:05:39 -05:00
Thomas Harte
fffc03c4e4
Propagates time to the audio subsystem.
2021-11-12 15:30:52 -05:00
Thomas Harte
0a94184d6b
Provides a greater wealth of audio data.
2021-11-11 09:24:15 -05:00
Thomas Harte
7be3578497
Adds a target for audio writes.
2021-11-09 07:11:23 -05:00
Thomas Harte
eeaccb8ac0
Implements clear_all_keys.
2021-11-08 17:49:09 -05:00
Thomas Harte
8ef9a932aa
Adds inclusive fill test; fixes inclusive fills.
2021-11-07 14:26:13 -08:00
Thomas Harte
31e22e4cfb
Provides full serial input.
2021-11-07 05:19:16 -08:00
Thomas Harte
ecfe68d70f
Introduce the principle that a Serial::Line can be two-wire — clock + data.
2021-11-06 16:54:20 -07:00
Thomas Harte
c0c2b5e3a9
Post key actions to the nominated serial line.
...
Albeit that I'm still thinking through whether I want the option of including a clock on Serial::Line. It'd be natural in one sense — there's already one built in — but might weaken Serial::Line's claim to be a one-stop shop for both enqueued and real-time connections without a reasonable bit of extra work.
2021-11-06 12:03:09 -07:00
Thomas Harte
471e13efbc
Transcribes keycodes.
2021-11-04 18:54:42 -07:00
Thomas Harte
c9bf2dda16
Attempt implementation of disk sync.
2021-11-02 18:18:59 -07:00
Thomas Harte
3ceb378b9b
Relocate disk logic into a separate compilation unit.
2021-11-02 17:35:23 -07:00
Thomas Harte
1cf1c90511
Adds support for interlaced output.
2021-11-02 14:34:03 -07:00
Thomas Harte
d989825216
Add bonus notes on VPOSR.
2021-11-02 03:47:39 -07:00
Thomas Harte
3976420b88
Retains a little more of output controls.
2021-11-01 17:15:36 -07:00
Thomas Harte
2f1ce5fe43
Switch to using the swizzled palette for playfield output.
2021-11-01 14:44:30 -07:00
Thomas Harte
42145a5b8a
Delay bitplane installation until end of slot.
2021-11-01 14:18:58 -07:00
Thomas Harte
4e66017205
Enable sprite reuse and toggle to inactive when visible region is over.
2021-10-31 16:52:48 -07:00
Thomas Harte
299d517449
Performs a first implementation of fill mode.
2021-10-31 14:36:31 -07:00
Thomas Harte
4c1ab6ff25
Rethinks bitplane stops.
2021-10-31 09:01:38 -07:00
Thomas Harte
16f31cab6a
Avoid duplication of CIA select test.
2021-10-30 12:05:18 -07:00
Thomas Harte
02c88e6826
VHPOSR's fields are the other way around.
2021-10-30 12:04:46 -07:00
Thomas Harte
d25804f4a2
Throws in official register names.
2021-10-29 14:05:11 -07:00
