1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-07-17 13:29:02 +00:00
Commit Graph

5 Commits

Author SHA1 Message Date
Thomas Harte
52c38e72f6 Starts seeking to automate register 3 handling.
Immediate pitfall: byte capture on the bus side isn't working correctly.
2021-02-14 20:37:33 -05:00
Thomas Harte
a51d143c35 Corrects reactive-device transmission logic.
Albeit that I'm still not properly responding to register 3 stuff, so the ADB bus needn't believe anything is out there. Also, without VSYNC being piped to the microcontroller it may well just not be polling anyway.
2021-02-14 18:54:22 -05:00
Thomas Harte
c284b34003 Resolves inability of ADB microcontroller to read its own ROM (!) 2021-02-13 17:53:40 -05:00
Thomas Harte
ea40b2c982 Takes a stab at implementing device response. 2021-02-12 18:56:43 -05:00
Thomas Harte
adfdfa205f Starts to establish the means by which I'll implement ADB devices. 2021-02-12 18:42:12 -05:00