Thomas Harte
2be817a6a1
Maps in "the interrupt ROM addresses".
2020-10-30 21:42:43 -04:00
Thomas Harte
a833bb892b
Increases logging substantially.
2020-10-30 20:11:55 -04:00
Thomas Harte
7f3f6c339f
Corrects stacked program bank during native-mode exceptions.
2020-10-30 20:11:39 -04:00
Thomas Harte
0d562699a2
Ensures unmapped regions are really unmapped.
2020-10-29 22:18:01 -04:00
Thomas Harte
034056d0cd
Adds full 8-bit clock addressing; stubs clock into the IIgs.
2020-10-29 21:38:36 -04:00
Thomas Harte
1249fb598b
Factors Apple's RTC out of the Macintosh.
2020-10-29 21:03:02 -04:00
Thomas Harte
5a8b8478d2
Corrects unhandled IO assert.
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The IIgs proper is actually waiting on communication with the RTC.
2020-10-28 22:14:02 -04:00
Thomas Harte
6c54699c44
Connects up an SCC.
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Thereby putting my IIgs into its first perpetual loop. Trying to do something with the SCC I haven't implemented yet perhaps?
2020-10-28 22:07:34 -04:00
Thomas Harte
266022b193
Fixes PEA.
2020-10-28 22:00:28 -04:00
Thomas Harte
94a6da6b7d
Exposes much of the auxiliary and language card stuff to the IIgs bus.
2020-10-28 21:58:20 -04:00
Thomas Harte
885fae1534
Stubs in a speed register.
2020-10-28 21:23:45 -04:00
Thomas Harte
1df2ce513a
Ensures that reset doesn't push to the stack.
2020-10-28 21:23:35 -04:00
Thomas Harte
1e4679ae14
Corrects JSL and RTL.
2020-10-28 17:25:40 -04:00
Thomas Harte
267dd59a59
Gets as far as seemingly yet another memory-map setting.
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Tomorrow, maybe?
2020-10-27 22:31:58 -04:00
Thomas Harte
0a91ac5af5
Adds some extra notes, starts getting into trying to run the IIgs.
2020-10-27 22:09:45 -04:00
Thomas Harte
ad93ad6018
Attempts to finish off shadowing.
2020-10-27 22:05:04 -04:00
Thomas Harte
0c700094ea
Goes branchless on shadowing.
2020-10-27 21:56:03 -04:00
Thomas Harte
20631a157b
Contorts somewhat in pursuit of branchless shadowing regardless of page and without extra storage.
2020-10-27 21:37:39 -04:00
Thomas Harte
bdda84dfde
Adds a very basic shadowing test.
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For the record, I'm aware that there's a lot here that I'm not testing. I think the smart move is to get towards a running machine and see which configurations it actually tries to set up, then follow along with appropriate testing; it might cause me to discover a flaw in my comprehension before I've made the same mistake in both the code and a test.
2020-10-27 19:59:41 -04:00
Thomas Harte
e44f95a882
Takes a first, faltering shot at shadowing.
2020-10-27 19:49:47 -04:00
Thomas Harte
31cd45f8b5
Takes a run at set_card_paging and simplifies method of shadowing.
2020-10-27 19:33:47 -04:00
Thomas Harte
74f9f6ad3b
Tests and corrects ROM access beyond bank $00.
2020-10-27 19:02:15 -04:00
Thomas Harte
1dfdb51e61
Hits a few other easy cases.
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Still to do: card paging, and finding out which banks that applies to, and shadowing. So: everything with flags.
2020-10-26 21:49:47 -04:00
Thomas Harte
18832dc19d
Attempts to expand the language card stuff to all affected pages.
2020-10-26 20:30:41 -04:00
Thomas Harte
3dee0666cb
Corrects current bank $00 language card behaviour.
2020-10-26 17:46:40 -04:00
Thomas Harte
f830f6a57a
Adds failing test of initial ROM mirroring.
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It's the end of the evening, so this is it for today.
2020-10-25 22:13:54 -04:00
Thomas Harte
82c733c68c
Adds some very basic actual tests.
2020-10-25 21:40:50 -04:00
Thomas Harte
ed510409c4
Starts memory map test class, already finding a typo.
2020-10-25 21:31:21 -04:00
Thomas Harte
7614eba4bf
Factors out the IIgs memory map logic.
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As testing would be rational.
2020-10-25 21:10:04 -04:00
Thomas Harte
13c8032465
ROM isn't writeable. The clue is in the name.
2020-10-25 18:29:17 -04:00
Thomas Harte
44fc08cd5b
Switches to a mapping system that supports non-continuous regions, and is smaller.
2020-10-25 18:28:32 -04:00
Thomas Harte
7631b11c55
Corrects double low-res colour serialisation.
2020-10-24 19:26:32 -04:00
Thomas Harte
726b5f62bb
Corrects read/write access to auxiliary soft switches.
2020-10-24 19:00:03 -04:00
Thomas Harte
ddd84db510
Edges towards a functioning IIgs memory map.
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Next up: making sure language and auxiliary switches apply. That should get something from the ROM.
2020-10-23 19:41:10 -04:00
Thomas Harte
966241b4cc
Adds documentation, ensures the language card signals less noisily.
2020-10-23 18:44:47 -04:00
Thomas Harte
9371a8993f
Factors out auxiliary memory switches and related decisions.
2020-10-22 22:33:31 -04:00
Thomas Harte
410c99de54
Factors out the language card memory selection logic.
2020-10-22 21:01:12 -04:00
Thomas Harte
817f93a490
Edges towards a working memory subsystem. At least structurally.
2020-10-22 19:25:04 -04:00
Thomas Harte
43611792ac
Adds just enough to get a 65816 ticking over.
2020-10-21 21:19:18 -04:00
Thomas Harte
62231708d7
read_pages_ can be const.
2020-10-21 21:17:15 -04:00
Thomas Harte
a5dcab4092
Ensures machines with no audio output are handled correctly.
2020-10-21 21:16:00 -04:00
Thomas Harte
8bde2e5f4c
Slightly neatens Cocoa machine picker.
2020-10-20 22:25:39 -04:00
Thomas Harte
5287c57ee0
Adds the IIgs as a user-selectable machine.
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Albeit that there is no underlying machine yet.
2020-10-20 22:18:11 -04:00
Thomas Harte
3aa47f9c68
Merge pull request #843 from TomHarte/MoreDormann
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Introduces a build of Dormann's 65C02 tests that is 65816 compatible.
2020-10-19 21:13:46 -04:00
Thomas Harte
ab07814614
Eliminates now-broken 65816 flow test.
2020-10-19 21:02:46 -04:00
Thomas Harte
1653abdf88
Adds the .lst; otherwise I'll probably just lose it.
2020-10-19 20:58:24 -04:00
Thomas Harte
b3ab9fff9b
Imports a custom-built copy of Klaus Dormann's 65C02 test, with only 65816-compatible parts.
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Thereby fixes another couple of 65816 issues — BRK(, etc) not clearing the decimal flag, and `TRB d` being mismapped.
2020-10-19 19:27:16 -04:00
Thomas Harte
14718b93a4
Improve commentary.
2020-10-19 09:32:50 -04:00
Thomas Harte
69450e27ad
Merge pull request #839 from TomHarte/65816
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Adds emulation of the 65816.
2020-10-18 21:49:46 -04:00
Thomas Harte
0cd08aa79d
Permits the Oric analyser to check CPC-style DSKs.
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Oric Mist seems to use that format, so some of these now exist out in the wild.
2020-10-18 21:44:44 -04:00
