Thomas Harte
6ab30e9cac
Adds a mention of the Master System.
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Given that Mac users are only one constituency now; others are directly tracking the repository.
2018-10-22 13:47:43 -04:00
Thomas Harte
027e9c7816
Merge pull request #563 from TomHarte/ResizeCrash
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Corrects likely crash shortly after starting a TMS9918 or derivative
2018-10-22 10:19:20 -04:00
Thomas Harte
7c65cfd932
Adds default values for WriteArea.
2018-10-21 21:18:54 -04:00
Thomas Harte
883680731a
Uses explicit state to determine whether a pixel target has been requested.
2018-10-21 21:18:41 -04:00
Thomas Harte
fb3171f366
Merge pull request #562 from TomHarte/TimingTweaks
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Corrects residual Master System interrupt timing issues.
2018-10-21 18:47:25 -04:00
Thomas Harte
c07f9fed99
Corrects test and implementation to pass the exhaustive VDP interrupt prediction test.
2018-10-21 18:42:49 -04:00
Thomas Harte
616777517d
Makes the failing test more communicative, in the hope of more easily debugging errors.
2018-10-21 14:35:44 -04:00
Thomas Harte
b3f1677da5
Introduces new failing test for rational continuous interrupt prediction.
2018-10-21 13:59:14 -04:00
Thomas Harte
16f08eb654
Slightly tweaks Master System timing numbers.
2018-10-21 13:58:34 -04:00
Thomas Harte
a38974ef2e
Merge pull request #559 from TomHarte/RowPhase
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Corrects row reporting for modes other than 192-line NTSC
2018-10-20 18:28:26 -04:00
Thomas Harte
725b364bbc
Improves testing; now tests for time to the first interrupt.
2018-10-20 18:25:55 -04:00
Thomas Harte
30b99f0049
Fixes a couple of interrupt prediction errors.
2018-10-20 18:25:28 -04:00
Thomas Harte
b61de65b43
Restores proper phase with the CPU.
2018-10-19 23:18:16 -04:00
Thomas Harte
0822c96ce0
Implements the proper row counter values for > 192 row modes.
2018-10-19 22:37:56 -04:00
Thomas Harte
3b164e5ffe
Adds missing #includes.
2018-10-19 22:20:23 -04:00
Thomas Harte
d5f1e76707
Merge pull request #558 from TomHarte/CodemastersDetection
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Implements the Codemasters paging scheme
2018-10-19 22:11:33 -04:00
Thomas Harte
f49718e94b
Ensures Codemasters games have the proper initial state.
2018-10-19 22:10:14 -04:00
Thomas Harte
b18db78cce
Merge pull request #557 from TomHarte/MasterSystemScreenshot
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Sneaks in a Master System screenshot.
2018-10-19 21:57:07 -04:00
Thomas Harte
c39fd17e54
Corrects extension.
2018-10-19 21:55:35 -04:00
Thomas Harte
78fff5bdd9
Sneaks a Sonic picture into the readme.
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Without even yet claiming to be a Master System emulator, given that I've still quite a few things to do there.
2018-10-19 21:54:21 -04:00
Thomas Harte
6fff514901
Honours the region by implementing Japanese (no BIOS) and European (PAL) paths.
2018-10-19 21:37:05 -04:00
Thomas Harte
f9a6c00493
Makes first attempt to support PAL timings.
2018-10-19 21:36:13 -04:00
Thomas Harte
fa77d81813
Corrects test for whether to consider a European or American region.
2018-10-19 21:35:52 -04:00
Thomas Harte
f0b6c406ff
The Sega static analyser now attempts to differentiate region and paging scheme.
2018-10-19 20:32:09 -04:00
Thomas Harte
c365cca38a
Makes order of operations explicit.
2018-10-18 22:37:04 -04:00
Thomas Harte
4cd65eab5c
Seeks to avoid bad macro expansion.
2018-10-18 22:36:25 -04:00
Thomas Harte
2ee360e6ba
Merge pull request #553 from TomHarte/MasterSystemVDP
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Adds Initial Sega SG1000 and Master System emulation
2018-10-18 22:30:57 -04:00
Thomas Harte
9bc09046c0
Attempts to ensure that sprites can go off the top of the screen.
2018-10-18 21:48:57 -04:00
Thomas Harte
10d9cbdeb1
Adds an extra LOG to track the memory map as a potential cause of emulation failure.
2018-10-18 21:48:37 -04:00
Thomas Harte
57f03e660c
Ensures console output only in debug builds.
2018-10-18 21:16:56 -04:00
Thomas Harte
512f085891
Ensures proper left clipping of sprites.
2018-10-18 21:14:16 -04:00
Thomas Harte
6a2db52adb
Ensures safe Megacart cartridge sizes too.
2018-10-18 21:09:05 -04:00
Thomas Harte
34e13d0d4d
Clears top bit when reading the keypad and ensures no undefined behaviour reading the cartridge.
2018-10-18 21:05:58 -04:00
Thomas Harte
da00c832f5
Corrects colour fetching for multicolour text mode.
2018-10-18 20:38:00 -04:00
Thomas Harte
8ff265c3a1
Corrects multicolour text mode.
2018-10-18 20:25:42 -04:00
Thomas Harte
0278d5b61c
Restores SG1000 compatibility.
2018-10-18 19:13:15 -04:00
Thomas Harte
1fc88c4eff
Corrects off-by-one error in line fetching coroutines.
2018-10-16 21:36:31 -04:00
Thomas Harte
58ca74c68a
Resolves right-side TMS sprite droppages.
2018-10-16 21:25:08 -04:00
Thomas Harte
b4f871a2ef
Corrects first line sprite row selection.
2018-10-16 21:16:29 -04:00
Thomas Harte
0f7bf6d6c6
Resolves attempt to output graphics on the line one before the display.
2018-10-16 21:02:31 -04:00
Thomas Harte
5dfe7d8596
Corrects most of TMS sprite drawing.
2018-10-16 20:49:04 -04:00
Thomas Harte
231009b901
Makes faulty attempt to reintroduce TMS-mode sprites.
2018-10-16 20:00:06 -04:00
Thomas Harte
1c5f939aea
Reintroduces tiles and some element of sprites in regular TMS mode.
2018-10-14 21:52:13 -04:00
Thomas Harte
c1e6406fc9
Corrects sprite accumulation.
2018-10-14 19:56:09 -04:00
Thomas Harte
d66979c68f
Switched to a very large number of buffers, and resolved stupid attempt to reassign a reference.
2018-10-14 18:19:11 -04:00
Thomas Harte
6c09abc6cb
Makes a flawed attempt to reformulate this exactly as two separate processes on a common clock with an interchange buffer.
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Specifically because closer inspection of the TMS modes shows it isn't quite valid to model output of one line as having fully completed prior to fetching of the next. So some sort of extra buffer is required. At which point it is most natural to continue with the logic that each fetch routine is oriented around the fetching process for a single line, and each output routine has the same view, suggesting separate read/write addresses.
Something is wrong though, as video data is being output too rapidly (I think) and with occasional sync issues (again: subject to investigation).
2018-10-14 16:23:45 -04:00
Thomas Harte
9e52ead09a
Ensures sprite scanning doesn't improperly set collision flag; that slot 151 is filled.
2018-10-12 19:50:48 -04:00
Thomas Harte
9ab0c54426
Eliminates faulty attempt to satisfy SMSVDP vertical counter test.
2018-10-12 18:57:07 -04:00
Thomas Harte
f6af6778ab
Moves scrolling latch to proper position and implements 4-window fetching offset.
2018-10-11 22:36:27 -04:00
Thomas Harte
6a94dda60d
Selects potentially-correct interrupt times.
2018-10-11 21:42:09 -04:00
