Thomas Harte
|
98423c6e41
|
Accepted FUSE's view of bits 3 & 5 from BIT and RES, reducing to 623 issues.
|
2017-05-27 16:19:15 -04:00 |
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Thomas Harte
|
33c3fa21e3
|
Fixed (HL)/(In + d) CB page modify instructions. Reducing failures to 672.
|
2017-05-27 15:54:24 -04:00 |
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Thomas Harte
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9bc2b48d9b
|
Found a form I like for indexed addressing, applying it only where obvious for now. Which eliminates more than a couple of hundred of remaining failures.
|
2017-05-26 23:23:33 -04:00 |
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Thomas Harte
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e4e71a1e5f
|
Switched back to descriptive failures, but put a cap on them.
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2017-05-25 21:08:24 -04:00 |
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Thomas Harte
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fba5af280e
|
Shortened failure message, at least for now.
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2017-05-25 21:05:47 -04:00 |
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Thomas Harte
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2cadc706e2
|
Now runs FUSE tests, albeit testing only a subset of the results. But enough to get started.
|
2017-05-25 21:00:33 -04:00 |
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Thomas Harte
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3c6f63abcc
|
Started towards running the FUSE tests. Just need to deal with the memory segments.
|
2017-05-25 19:12:59 -04:00 |
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Thomas Harte
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00cd7e7e9c
|
After hitting my head against the wall of trying to use [NS]Scanner as a parser some more, have given up and transcoded the two tests files to JSON.
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2017-05-25 18:20:13 -04:00 |
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Thomas Harte
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055c860b43
|
Sealed off RegisterState as immutable, and started trying to parse the .expected file.
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2017-05-23 22:32:36 -04:00 |
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Thomas Harte
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454c8628c3
|
Implemented an additional constructor for RegisterStates, pulling it out into file-level scope and implementing Equatable.
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2017-05-23 22:05:33 -04:00 |
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Thomas Harte
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a23a6db4d6
|
Tidied up, creating a holder for RegisterState and giving it deserialisation logic. This makes sense because a register state will also need to be taken from the outputScanner, and from the machine.
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2017-05-23 08:13:24 -04:00 |
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Thomas Harte
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6575091a78
|
Fixed Z80's ownership of its fetch-decode-execute program, its habit of scheduling invalidly when hitting an unrecognised operation and the test machine's habit of dereferencing invalidly.
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2017-05-22 21:50:34 -04:00 |
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Thomas Harte
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9e25d014d2
|
Made an attempt to log bus activity for comparison with FUSE results.
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2017-05-22 19:49:38 -04:00 |
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Thomas Harte
|
41d5dd8679
|
Added a memory access delegate to the Z80 all-ram processor, to allow access patterns to be captured.
|
2017-05-22 19:24:11 -04:00 |
|
Thomas Harte
|
22afa509ca
|
Got to a parsing and towards an attempt to run FUSE tests.
|
2017-05-22 19:14:46 -04:00 |
|
Thomas Harte
|
3fb3cc8269
|
Got explicit about encodings.
|
2017-05-21 22:53:06 -04:00 |
|
Thomas Harte
|
e3e461d7cb
|
Added a test class for running the FUSE tests. With nothing much in it.
|
2017-05-21 22:49:24 -04:00 |
|
Thomas Harte
|
c16fccb317
|
Fixed file names.
|
2017-05-21 22:43:07 -04:00 |
|
Thomas Harte
|
b9cffdf2bd
|
Imported the FUSE tests.
|
2017-05-21 22:42:20 -04:00 |
|
Thomas Harte
|
01a064dd63
|
Added an empty ED page.
|
2017-05-20 17:29:30 -04:00 |
|
Thomas Harte
|
d910405648
|
Added enough infrastructure to be able to react to the two CP/M calls this cares about.
|
2017-05-19 21:53:39 -04:00 |
|
Thomas Harte
|
62b432c046
|
Added the concept of a trap handler to the all-RAM processor and exposed it via the test Z80 classes.
|
2017-05-19 21:20:28 -04:00 |
|
Thomas Harte
|
11d05fb3b8
|
Expanded a little on operations, added an implementation or two.
|
2017-05-19 19:18:35 -04:00 |
|
Thomas Harte
|
58efca835f
|
Sought to add a further opcode.
|
2017-05-18 22:53:43 -04:00 |
|
Thomas Harte
|
da6e520b91
|
Merge branch 'master' into Z80
|
2017-05-18 22:30:51 -04:00 |
|
Thomas Harte
|
9398b6c2c8
|
Unable to differentiate, decided to map a Mac shift key to both Oric shifts.
|
2017-05-18 22:25:59 -04:00 |
|
Thomas Harte
|
a3dafa9056
|
Abbreviated uses of enumerations.
|
2017-05-17 21:44:08 -04:00 |
|
Thomas Harte
|
64d6ee1be5
|
Adjusted slightly to adapt to latest Swift warnings.
|
2017-05-17 07:49:48 -04:00 |
|
Thomas Harte
|
1378ab7278
|
Ensured initial program counter and stack pointer are correct for Zexall, fixed the Z80 to use a compile-time polymorphic call for bus access.
|
2017-05-17 07:36:06 -04:00 |
|
Thomas Harte
|
87a021ec2d
|
Made further attempt to get as fas as having the Z80 attempt to do something.
|
2017-05-16 22:19:40 -04:00 |
|
Thomas Harte
|
189317b80c
|
Added enough of a Z80 test machine to bridge up into Swift.
|
2017-05-16 22:05:42 -04:00 |
|
Thomas Harte
|
4f0775cc7c
|
Imported the Zexall.com tester, as a first thing to throw at the Z80 to be.
|
2017-05-16 21:37:09 -04:00 |
|
Thomas Harte
|
7190f927b7
|
Factored out the stuff that both all-RAM processors would share, rather than duplicating it.
|
2017-05-16 21:28:17 -04:00 |
|
Thomas Harte
|
d559d8b901
|
Continued edging towards getting the absolute basics of a testable Z80, for test-driven development. Corrected old-fashioned instance naming issues with the corresponding 6502 class and removed an unnecessary source file while at it.
|
2017-05-16 21:19:17 -04:00 |
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Thomas Harte
|
df80c37adb
|
Renamed TestMachine to TestMachine6502 since there's going to be multiple of them.
|
2017-05-15 08:18:57 -04:00 |
|
Thomas Harte
|
0808e9b6fb
|
Pulled the 6502 into a CPU namespace, making it an instance of something that has micro-opcodes and schedules them, and factoring out the formulation of a register pair.
|
2017-05-14 22:08:15 -04:00 |
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Thomas Harte
|
b81a2cc273
|
First tentative steps towards adding a Z80 implementation.
|
2017-05-14 17:46:41 -04:00 |
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Thomas Harte
|
8e35e913bb
|
Formally withdrew the 'load automatically' option for the Vic, having removed that option elsewhere.
|
2017-05-14 16:59:24 -04:00 |
|
Thomas Harte
|
2edf73908c
|
Temporarily disabled the existing fast loading implementation in pursuit of another, and started trying to correct the lack of connection between the userport VIA and the tape drive.
|
2017-05-06 22:00:12 -04:00 |
|
Thomas Harte
|
92a8b68859
|
Dumped Mach-specific test-and-set in favour of ordinary C11.
|
2017-04-15 21:41:59 -04:00 |
|
Thomas Harte
|
bdd432fe1d
|
Added an ugly workaround for the empirical sound shutdown issues.
|
2017-03-26 20:28:04 -04:00 |
|
Thomas Harte
|
e01f3f06c8
|
Completed curly bracket movement.
|
2017-03-26 14:34:47 -04:00 |
|
Thomas Harte
|
031a68000a
|
Added a class to contain the Pitfall 2 pager and a skeleton of initial work.
|
2017-03-18 22:08:47 -04:00 |
|
Thomas Harte
|
c3d82f88a5
|
Tidied up and commented on the Activision stack implementation.
|
2017-03-18 21:01:58 -04:00 |
|
Thomas Harte
|
c033bad0b9
|
Here's MNetwork!
|
2017-03-18 20:51:49 -04:00 |
|
Thomas Harte
|
c31d85f820
|
Re-emplaced the MegaBoy. Also cut detritus from the main Atari header.
|
2017-03-18 19:02:34 -04:00 |
|
Thomas Harte
|
217fbf257e
|
CBS RAM Plus returns.
|
2017-03-18 18:56:20 -04:00 |
|
Thomas Harte
|
0b611a14b9
|
Tigervision paging returns.
|
2017-03-18 18:50:13 -04:00 |
|
Thomas Harte
|
df6861c9dc
|
Parker Bros paging is back.
|
2017-03-18 18:21:01 -04:00 |
|
Thomas Harte
|
a4cd12394e
|
Reinstated the Activision stack pager.
|
2017-03-18 18:03:48 -04:00 |
|
Thomas Harte
|
bb3daaa99b
|
Sought to reintroduce the Atari 8k paging scheme, at the same time deciding to do away with the copy and paste of holding on to ROM data.
|
2017-03-18 15:04:01 -04:00 |
|
Thomas Harte
|
14a76af0d3
|
Started trying to float out bus control to cartridges.
|
2017-03-17 20:28:07 -04:00 |
|
Thomas Harte
|
a6897ebde0
|
Added an attempt to distinguish the MegaBoy (now with proper capitalisation) and a test for it.
|
2017-03-13 20:43:12 -04:00 |
|
Thomas Harte
|
582da14a14
|
Added an enumerated type and detection of Pitfall 2.
|
2017-03-13 08:15:36 -04:00 |
|
Thomas Harte
|
8e147444d5
|
Added a readme, as is traditional for folders I'm excluding from Git.
|
2017-03-12 22:16:12 -04:00 |
|
Thomas Harte
|
2c07cce282
|
Had the wrong paging scheme listed for Robot Tank and Thwocker. Better to get this right before trying to come up with a test for the Activision stack scheme.
|
2017-03-12 21:03:10 -04:00 |
|
Thomas Harte
|
597bd97b01
|
Corrected two more table errors.
|
2017-03-12 15:46:25 -04:00 |
|
Thomas Harte
|
38de5300e5
|
Elevator Action seemingly uses a Super Chip.
|
2017-03-12 15:43:42 -04:00 |
|
Thomas Harte
|
146f3ea0f5
|
Fixed: Crystal Castles is 16kb.
|
2017-03-12 15:39:07 -04:00 |
|
Thomas Harte
|
78213f1e95
|
Fixed a couple more table entries, introduced per-size tests (plus a catch-all), to speed up the development/testing cycle.
|
2017-03-12 15:35:36 -04:00 |
|
Thomas Harte
|
de347ad7c8
|
Improved CBS RAM Plus and Super Chip detection exclusion, reducing error count to 15.
|
2017-03-12 14:03:17 -04:00 |
|
Thomas Harte
|
a4bba8a92e
|
Made a couple of lookup table fixes and corrected RAM region detection windows; failures now down to 19.
|
2017-03-11 23:18:30 -05:00 |
|
Thomas Harte
|
fcacfc2726
|
Tidied up spacing, slightly.
|
2017-03-11 23:01:42 -05:00 |
|
Thomas Harte
|
bab464e765
|
I'm far from confident, but this should reduce the deviations close to those that result from mistakes by the static analyser, rather than table errors.
|
2017-03-11 22:58:11 -05:00 |
|
Thomas Harte
|
2879763c34
|
Reduced to 84 failures through more accurate tabulation.
|
2017-03-11 21:52:52 -05:00 |
|
Thomas Harte
|
ea2ea30193
|
Fleshed entire table out with most common values. Exceptions now to fix.
|
2017-03-11 21:11:25 -05:00 |
|
Thomas Harte
|
608569cc48
|
Typed out all the 'A's that I am aware of. So about 5% done.
|
2017-03-11 20:58:38 -05:00 |
|
Thomas Harte
|
c7e973aab4
|
Extended test set a little, corrected current failures.
|
2017-03-11 20:51:25 -05:00 |
|
Thomas Harte
|
443d57bc32
|
Slimmed output and added first six tests. Acid Drop fails since I'm not yet declaring Atari 16k and Atari 32k.
|
2017-03-11 20:43:19 -05:00 |
|
Thomas Harte
|
57ec756f5b
|
Started speccing out a unit test for Atari ROM analysis.
|
2017-03-11 20:33:58 -05:00 |
|
Thomas Harte
|
b193248056
|
Ensured that queue is not touched at all outside of the critical section.
|
2017-03-11 18:17:09 -05:00 |
|
Thomas Harte
|
a72d70e707
|
Enabled code coverage calculation for unit tests.
|
2017-03-11 17:44:56 -05:00 |
|
Thomas Harte
|
38ce4dc56c
|
Fixed potential deadlock, if a delegate decided to dealloc the queue as a result of its prompting.
|
2017-03-11 17:44:02 -05:00 |
|
Thomas Harte
|
d3257c345a
|
Tested against public ROMs and corrected. Also moved the deferred adjustment into a more canonical place.
|
2017-03-04 17:00:28 -05:00 |
|
Thomas Harte
|
e09b76bf32
|
Fixed 'same value, then immediate increment, then proper counting increments' behaviour and ensured it takes one cycle to commit a value. Adjusted tests to match.
|
2017-03-04 15:57:54 -05:00 |
|
Thomas Harte
|
dcd0c90283
|
Switched time of best-effort updater delegate setting, to avoid a callback before setupClockRate has happened, and therefore before it's clear what should be going on with audio.
|
2017-02-26 21:58:59 -05:00 |
|
Thomas Harte
|
2f0c923c29
|
Switched away from @synchronized as it appears possibly to be the lock used during -dealloc, creating deadlock with the CSAudioQueueDeallocLock.
|
2017-02-22 21:42:10 -05:00 |
|
Thomas Harte
|
4c947ad553
|
Attempted to resolve risk of an audio callback being in progress when -dealloc is received.
|
2017-02-22 21:12:59 -05:00 |
|
Thomas Harte
|
1d03793f22
|
Fixed potential race condition: ensure the queue is disposed of synchronously because otherwise there'll be a potential dangling reference to self.
|
2017-02-22 07:35:09 -05:00 |
|
Thomas Harte
|
99a35266e1
|
Attempted to bring frequency-switching logic into the cross-platform realm. Which for now creates an issue with the OpenGL context.
|
2017-02-19 21:20:37 -05:00 |
|
Thomas Harte
|
dd17459687
|
Added my first failing test: delay is incorrect when resetting outside of the play area.
|
2017-02-12 20:42:49 -05:00 |
|
Thomas Harte
|
cd90118a0f
|
Added two, extraordinarily simple tests.
|
2017-02-12 20:32:53 -05:00 |
|
Thomas Harte
|
327c19a222
|
Slightly shuffled to avoid a race condition on the best-effort updater.
|
2017-02-11 12:58:47 -05:00 |
|
Thomas Harte
|
92754ace7a
|
Some mild fixes get me up to having a rolling screen of vertical lines. Which is what I was hoping for right now!
|
2017-01-29 22:16:23 -05:00 |
|
Thomas Harte
|
d51f185dc7
|
Made an attempt to reintroduce the basic horizontal loop.
|
2017-01-29 15:43:57 -05:00 |
|
Thomas Harte
|
fba6baaa9c
|
Stubbed and disabled to get back to building.
|
2017-01-28 21:56:01 -05:00 |
|
Thomas Harte
|
0ffded72a6
|
Created a placeholder class for a factored-out TIA. There's a bit more it'll need to do, like vending (or receiving) a CRT but this is the full hardware stuff, I think.
|
2017-01-28 16:19:08 -05:00 |
|
Thomas Harte
|
9001cc3fc2
|
Added a cartridge image.
|
2017-01-27 21:26:11 -05:00 |
|
Thomas Harte
|
015b2b49f9
|
Introduced an incomplete set of file association icons.
|
2017-01-26 22:21:55 -05:00 |
|
Thomas Harte
|
7b696b0962
|
Switched scheme to shared.
|
2016-12-31 13:11:07 -05:00 |
|
Thomas Harte
|
a568172758
|
Made steps towards proper CRC generation. Am currently comparing against Oric disk images, as — amongst other things — they include precomputed CRCs.
|
2016-12-28 18:29:37 -05:00 |
|
Thomas Harte
|
99993a1b24
|
Since it's about to become important that objective results match, added a couple of objective-result tests for the CRC generator.
|
2016-12-27 19:03:46 -05:00 |
|
Thomas Harte
|
d606bd7ce5
|
Added saturation test, fixed code as indicated.
|
2016-12-24 23:29:37 -05:00 |
|
Thomas Harte
|
09ff9d6a26
|
Introduced a couple more floating-point conversion tests, fixed errors uncovered.
|
2016-12-24 23:21:19 -05:00 |
|
Thomas Harte
|
e25195a718
|
Added a single test for Storage::Time, discovering that I had the wrong sign on float conversions.
|
2016-12-24 22:59:01 -05:00 |
|
Thomas Harte
|
7028f57336
|
Simplified a little further.
|
2016-12-22 18:13:10 -05:00 |
|
Thomas Harte
|
e4e0347638
|
Attempted to consolidate some of the repetition.
|
2016-12-21 22:17:00 -05:00 |
|
Thomas Harte
|
72ca06cf8d
|
Added some extra tests, performed some basic tidying. Probably should do more.
|
2016-12-21 19:54:19 -05:00 |
|
Thomas Harte
|
6a0c7f22ee
|
Added a few more tests. All passing.
|
2016-12-20 21:46:34 -05:00 |
|
Thomas Harte
|
03579f33f1
|
Fixed multi-coverage insertion, via an appropriate test.
|
2016-12-20 21:38:32 -05:00 |
|