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Commit Graph

459 Commits

Author SHA1 Message Date
Thomas Harte
dd0f17130a Found and fixed some timing errors in absolute indexed and in (indirect), y addressing modes: neither is able in write or read-modify-write modes to shave a cycle as then can when reading. 2015-08-13 02:58:39 +01:00
Thomas Harte
975836c30f Added a quick snippet test, discovering that I've cut a cycle from read/modify/writes. 2015-08-13 02:18:41 +01:00
Thomas Harte
503d684af0 Added a couple of timing tests, both of which seem to pass for now. 2015-08-13 01:55:23 +01:00
Thomas Harte
d19f8ed507 Removed the implicit reset upon 6502 startup, adding a reset line. Hence all tests now pass again. Added an empty shell for timing tests, the all-RAM 6502 now counting bus cycles. 2015-08-13 00:51:06 +01:00
Thomas Harte
c1d1fb65cb Made an attempt properly to emulate the RDY line and the Atari's use of it. 2015-07-31 16:54:20 -04:00
Thomas Harte
53dd5c8f16 Trying to fix my RDY line emulation. Switched to PAL timings, at least temporarily, since it's starting to make a difference. 2015-07-31 16:44:53 -04:00
Thomas Harte
cd0a62d21e With a slight tweak to the informal protocol used for 6502 memory access cycles, ensured the wait strobe actually halts the CPU, to give a more accurate linking of machine time to real time. 2015-07-26 15:55:19 -04:00
Thomas Harte
6252f6030f Switched to idiomatic source name, ensured latest project name is in all appropriate header places, threw texture coordinates slightly into the shader mix. 2015-07-26 15:25:11 -04:00
Thomas Harte
6558ae1425 Imported what little I have so far in the way of a memory-access cycle complete 6502 and just enough of a pretend Atari 2600 on top to be able to see some playfields in ASCII art. 2015-07-16 19:56:02 -04:00