Thomas Harte
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686dccb48d
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Correct comparison.
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2022-06-26 21:49:58 -04:00 |
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Thomas Harte
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1f7700edac
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Ensure proper register hits.
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2022-06-26 21:20:57 -04:00 |
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Thomas Harte
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5adc656066
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Make some attempt to use the JSON tests.
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2022-06-25 21:41:37 -04:00 |
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Thomas Harte
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9cf64ea643
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Import generated tests.
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2022-06-25 16:46:57 -04:00 |
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Thomas Harte
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f2c2027a8c
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Disable test generation for commit.
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2022-06-24 16:50:23 -04:00 |
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Thomas Harte
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ef5ac1442f
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Don't invent an address for STP and WAI.
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2022-06-24 13:05:32 -04:00 |
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Thomas Harte
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1c1ce625a7
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Vector reads signal VDA.
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2022-06-24 10:37:39 -04:00 |
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Thomas Harte
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a442077eac
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Allow repetition for MVN and MVP only.
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2022-06-24 10:34:43 -04:00 |
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Thomas Harte
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6c638712f3
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Attempt to capture MVP and MVN in their entirety.
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2022-06-24 07:39:58 -04:00 |
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Thomas Harte
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2e7afb13c7
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Exit gracefully upon a STP or WAI.
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2022-06-23 21:03:40 -04:00 |
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Thomas Harte
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65140b341d
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Simplify slightly, per new S reporting rule.
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2022-06-22 16:43:00 -04:00 |
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Thomas Harte
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2f684ee66d
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Use null for values that were never loaded.
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2022-06-21 21:47:18 -04:00 |
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Thomas Harte
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ab0c290489
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Use 'x' instead of 'i'.
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2022-06-19 06:58:23 -04:00 |
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Thomas Harte
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15ac2c3e5a
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Output to files, at volume, with extended bus flags.
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2022-06-18 22:00:50 -04:00 |
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Thomas Harte
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0c24a27ba6
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Completely prints tests.
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2022-06-18 21:32:50 -04:00 |
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Thomas Harte
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eb82e06fab
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Add randomised initial state, fix PC.
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2022-06-18 19:21:56 -04:00 |
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Thomas Harte
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f8e6954739
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Ensure complete runs of each tested opcode.
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2022-06-18 16:26:40 -04:00 |
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Thomas Harte
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b62f484d93
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Start scaffolding a 65816 test generator.
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2022-06-18 13:28:15 -04:00 |
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Thomas Harte
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6cc41d6dda
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Restore 1000 test count.
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2022-06-14 22:02:53 -04:00 |
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Thomas Harte
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d91f8a264e
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Flip presumption, reenabling most tests.
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2022-06-14 21:57:14 -04:00 |
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Thomas Harte
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e066546c13
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Resolve PEA timing errors.
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2022-06-13 14:08:42 -04:00 |
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Thomas Harte
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7dc66128c2
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Fix strobe output.
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2022-06-13 10:49:47 -04:00 |
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Thomas Harte
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e484e4c9d7
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Expand test to make sure that correct data strobes are active.
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2022-06-13 10:39:06 -04:00 |
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Thomas Harte
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f316cbcf94
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The old implementation was correct.
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2022-06-11 21:15:08 -04:00 |
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Thomas Harte
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0a6b2b7d32
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Verify newer CMPA.l, RTE, TRAP[V] and CHK.
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2022-06-11 11:17:18 -04:00 |
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Thomas Harte
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c3345dd839
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Fix MOVEM timing.
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2022-06-10 21:52:07 -04:00 |
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Thomas Harte
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917b7fbf80
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Notarise won't fix status of CLR, NEGX, NEG, NOT.
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2022-06-10 16:50:38 -04:00 |
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Thomas Harte
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97715e7ccc
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Expand test set to include those with timing discrepancies.
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2022-06-10 16:34:05 -04:00 |
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Thomas Harte
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43c0dea1bd
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With the difference in RESET times now factored out, test timing too.
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2022-06-10 16:12:54 -04:00 |
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Thomas Harte
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2e4652209b
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Remove entire RESET sequence, move to testing PEA.
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2022-06-10 15:57:54 -04:00 |
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Thomas Harte
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e2d811a7a0
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Notarise digressions that appear to be correct, remove now-working RTE/RTR.
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2022-06-09 21:48:15 -04:00 |
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Thomas Harte
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dd5c903fd6
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DIVS also appears sometimes to differ.
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2022-06-09 20:19:39 -04:00 |
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Thomas Harte
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2e1675066d
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Reinstate address error non-testing.
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2022-06-09 16:59:06 -04:00 |
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Thomas Harte
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be84ce657b
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Add an optional testing whitelist.
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2022-06-09 16:18:04 -04:00 |
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Thomas Harte
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64053d697f
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Take improved guess at address error stacking order.
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2022-06-09 16:17:09 -04:00 |
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Thomas Harte
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a59ad06438
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Print out summary of failure.
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2022-06-09 13:13:33 -04:00 |
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Thomas Harte
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5af03d74ec
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Add note to self about first diagnosis.
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2022-06-09 12:21:39 -04:00 |
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Thomas Harte
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ba2803c807
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Include all bus activity after the split.
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2022-06-09 11:30:22 -04:00 |
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Thomas Harte
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fdcbf617d8
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Avoid STOP.
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2022-06-09 08:42:31 -04:00 |
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Thomas Harte
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cc7a4f7f91
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Fix test build.
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2022-06-08 21:15:11 -04:00 |
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Thomas Harte
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2e42bda0a3
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Permit instructions that end in an address error to differ in transactions.
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2022-06-08 16:15:33 -04:00 |
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Thomas Harte
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168dc12e27
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Avoid spurious mismatches.
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2022-06-08 16:03:02 -04:00 |
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Thomas Harte
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fd1955e15b
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Attempt to randomise and test register contents.
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2022-06-08 15:12:47 -04:00 |
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Thomas Harte
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f4f93f4836
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Test a single, whole instruction; record read/write.
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2022-06-08 14:53:04 -04:00 |
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Thomas Harte
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dd0a7533ab
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Randomise all parts of memory other than the opcode.
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2022-06-08 14:43:51 -04:00 |
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Thomas Harte
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50130b7004
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Minor layout tweak.
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2022-06-08 11:42:42 -04:00 |
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Thomas Harte
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ab52c5cef2
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Pass first all-zeroes test, establishing that processors aren't being fully reset.
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2022-06-08 10:56:54 -04:00 |
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Thomas Harte
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c7fa93a5bc
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Attempt human-legible explanation of differences encountered.
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2022-06-08 10:51:05 -04:00 |
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Thomas Harte
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400b73b5a2
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Allow capture to be limited; retain timestamps.
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2022-06-08 09:49:27 -04:00 |
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Thomas Harte
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788b026cf5
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Log and attempt to compare some activity. Sort of.
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2022-06-07 16:56:05 -04:00 |
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