Thomas Harte
|
70745286a5
|
Ensured this array is properly aligned for the uin32_t accesses I intend to make for background drawing.
|
2017-02-08 20:25:23 -05:00 |
|
Thomas Harte
|
dcb7584060
|
Added the four-cycle playfield output latency and ensured you can't get smaller-than-usual pixels by rapid register value changing.
|
2017-02-08 07:30:32 -05:00 |
|
Thomas Harte
|
a477499724
|
Got a bit more explicit with range returned by get_cycles_until_horizontal_blank and hence attempted a more thorough (/correct) version of WSYNC.
|
2017-02-07 22:14:45 -05:00 |
|
Thomas Harte
|
944d835eea
|
Switched explicitly to an accumulation model for filling the collision buffer.
|
2017-02-06 21:59:28 -05:00 |
|
Thomas Harte
|
8f5039130c
|
Changed index naming order to ensure no out-of-bounds accesses.
|
2017-02-06 21:48:41 -05:00 |
|
Thomas Harte
|
ba165bb70a
|
Made an attempt properly to populate collision registers from the collision buffer.
|
2017-02-06 21:15:55 -05:00 |
|
Thomas Harte
|
474e2e8d2c
|
Fixed once again to respect mid-line palette changes.
|
2017-02-06 20:09:12 -05:00 |
|
Thomas Harte
|
8b8eb787df
|
Fixed complete invisibility.
|
2017-02-06 18:42:58 -05:00 |
|
Thomas Harte
|
66bcdd36f3
|
Made an attempt to introduce an intermediate buffer that ends up with a bit mask of all graphical components present on it, and to use that to infer collision flags and colours, based on playfield priority and colour palette. Immediately yielding: a blank screen. Good work!
|
2017-02-06 18:29:00 -05:00 |
|
Thomas Harte
|
6bcf95042c
|
Started trying to be a bit more explicit about usage, and to divide up drawing responsibility.
|
2017-02-05 17:51:56 -05:00 |
|
Thomas Harte
|
f2437cb257
|
Added some additional documentation, started making steps towards returning sprites, fixed a counter bug that would exhibit as incorrect sync.
|
2017-01-31 20:30:32 -05:00 |
|
Thomas Harte
|
abe04334c2
|
Attempted to retain more player information, and removed the output cursor from class storage as I think it's acceptable as a temporary.
|
2017-01-30 22:42:27 -05:00 |
|
Thomas Harte
|
8545707b54
|
Reinstituted the playfield. Probably needs more buffering though. Time to look into delays.
|
2017-01-30 21:38:58 -05:00 |
|
Thomas Harte
|
2b08758b2b
|
Started capturing playfield/ball and background colours.
|
2017-01-30 08:08:03 -05:00 |
|
Thomas Harte
|
764b528891
|
Made a first attempt at switching to a model that respects blank and sync.
|
2017-01-30 07:19:19 -05:00 |
|
Thomas Harte
|
92754ace7a
|
Some mild fixes get me up to having a rolling screen of vertical lines. Which is what I was hoping for right now!
|
2017-01-29 22:16:23 -05:00 |
|
Thomas Harte
|
d51f185dc7
|
Made an attempt to reintroduce the basic horizontal loop.
|
2017-01-29 15:43:57 -05:00 |
|
Thomas Harte
|
2390358c24
|
Prevented unbounded CPU usage, albeit without yet deciding who has authority for the clock rate.
|
2017-01-29 14:19:26 -05:00 |
|
Thomas Harte
|
2432a3b4d7
|
Fixed condition — >= is smarter.
|
2017-01-29 14:00:01 -05:00 |
|
Thomas Harte
|
9c3597c7e3
|
Attempted to reintroduce enough logic to handle [most of] line timing, such that WSYNC works. Initial objective is to get back to having a working background.
|
2017-01-29 13:47:36 -05:00 |
|
Thomas Harte
|
fba6baaa9c
|
Stubbed and disabled to get back to building.
|
2017-01-28 21:56:01 -05:00 |
|
Thomas Harte
|
a246530953
|
Supposing the TIA were implemented, this is (more or less) what the Atari 2600 would now look like.
|
2017-01-28 21:46:40 -05:00 |
|
Thomas Harte
|
0ffded72a6
|
Created a placeholder class for a factored-out TIA. There's a bit more it'll need to do, like vending (or receiving) a CRT but this is the full hardware stuff, I think.
|
2017-01-28 16:19:08 -05:00 |
|
Thomas Harte
|
6d087ca054
|
Restored 2600 audio.
|
2017-01-25 21:29:19 -05:00 |
|
Thomas Harte
|
be1cb2a551
|
Fixed NTSC phase.
|
2017-01-11 21:31:24 -05:00 |
|
Thomas Harte
|
6153ada33b
|
Fixed Electron's support for automatically booting floppy disks.
|
2017-01-08 14:46:19 -05:00 |
|
Thomas Harte
|
8cd1575891
|
Similar fix to that over in Oric land: ensure a known, effective initial value for the Plus 3's control register.
|
2016-12-28 18:52:36 -05:00 |
|
Thomas Harte
|
90151e2094
|
Fixed to ensure a known initial control register value, which has taken effect.
|
2016-12-28 18:49:32 -05:00 |
|
Thomas Harte
|
a568172758
|
Made steps towards proper CRC generation. Am currently comparing against Oric disk images, as — amongst other things — they include precomputed CRCs.
|
2016-12-28 18:29:37 -05:00 |
|
Thomas Harte
|
4fca30b81f
|
Made the Plus 3 less chatty, documented invalidate_track.
|
2016-12-25 21:06:58 -05:00 |
|
Thomas Harte
|
3805e3d17d
|
Ensured base address is set properly at construction.
|
2016-12-22 22:46:02 -05:00 |
|
Thomas Harte
|
63107cd492
|
Tidied, very slightly.
|
2016-12-15 19:49:25 -05:00 |
|
Thomas Harte
|
a555c5762a
|
Rearranged code, hopefully into a more logical grouping.
|
2016-12-15 19:47:04 -05:00 |
|
Thomas Harte
|
4a7ddaf2e9
|
Added documentation and a quick note to self.
|
2016-12-15 19:43:04 -05:00 |
|
Thomas Harte
|
f61176cd7d
|
Reinstituted something of the don't-do-pixel-work-until-an-affecting-write-occurs optimisation.
|
2016-12-15 19:20:14 -05:00 |
|
Thomas Harte
|
c1c70a767a
|
Attempted fully to reinstate proper timing.
|
2016-12-15 18:52:16 -05:00 |
|
Thomas Harte
|
0326316bb8
|
Reinstated whole-frame counting. Thereby to reinstate proper interrupts.
|
2016-12-15 18:09:49 -05:00 |
|
Thomas Harte
|
b58b11fc93
|
Switched to a table-based dispatch of line-by-line actions, primarily to simplify.
|
2016-12-15 18:07:46 -05:00 |
|
Thomas Harte
|
fd541e1142
|
An early draft; dealing with the issue that not all cycles are necessarily consumed in a single call. Incomplete; broken. Committing for cross-machine visibility.
|
2016-12-12 08:01:10 -05:00 |
|
Thomas Harte
|
be7e05e109
|
Started attempting to move total responsibility for display-related interrupts and RAM timing into the video.
|
2016-12-11 18:34:49 -05:00 |
|
Thomas Harte
|
c5cf8d9531
|
Ensured the video subsystem correctly handles requests to run over a frame boundary.
|
2016-12-11 16:17:51 -05:00 |
|
Thomas Harte
|
52028432e1
|
Restored some semblance of output.
|
2016-12-10 22:19:10 -05:00 |
|
Thomas Harte
|
0aae1bd1ef
|
Fixed calculation of termination cycle.
|
2016-12-10 21:35:41 -05:00 |
|
Thomas Harte
|
c43e481a33
|
Started factoring video out of the Electron.
|
2016-12-10 21:07:52 -05:00 |
|
Thomas Harte
|
e62be03673
|
Removed endianness assumption.
|
2016-12-10 19:10:33 -05:00 |
|
Thomas Harte
|
a5683dfb21
|
Removed now untrue comment.
|
2016-12-10 15:19:48 -05:00 |
|
Thomas Harte
|
0e71802b92
|
Reduced Oric video to single nibble constants. Removed attempt at asynchronous flush as no longer required.
|
2016-12-10 14:17:46 -05:00 |
|
Thomas Harte
|
580f347727
|
Fixed Oric SCART mode by having it change what it's giving to the CRT based on which shader it knows will be active.
|
2016-12-10 13:55:56 -05:00 |
|
Thomas Harte
|
a549fd1ecc
|
Introduced the ability simply to piggy-back off the CRT's natural phase for the colour burst, thereby eliminating a couple of redundant independent attempts in the Oric and Electron.
|
2016-12-10 13:42:34 -05:00 |
|
Thomas Harte
|
6cdd41e5a9
|
Added direct use of the colour ROM, uploading 16 bits per pixel to contain the entire ROM composite wave.
|
2016-12-09 22:17:10 -05:00 |
|