Thomas Harte
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c6e046253e
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Shunted code for the main part up into the header, in advance of turning it into a template so as to bring it inside the normal orthodoxy.
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2016-08-05 19:13:49 -04:00 |
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Thomas Harte
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5d40d70c92
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Fixed 6560 addressing error, added an autotyper for Vic disks (more work potentially needed), fixed semantics for testing whether a 6502 is about to reset.
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2016-08-01 10:32:32 -04:00 |
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Thomas Harte
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b43a7381ae
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Fixed framing and first-byte-after-sync signalling. Hacked together as parts of it are, loading now appears to work!
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2016-08-01 04:25:11 -04:00 |
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Thomas Harte
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11cd541786
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Fixed accidental indentation.
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2016-07-10 08:05:05 -04:00 |
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Thomas Harte
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c0ab45a73d
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Disabled a bunch of the caveman debug logging.
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2016-07-09 22:29:11 -04:00 |
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Thomas Harte
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7cc4bf3fe7
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Hit and hope is getting me nowhere. Time to unit test this thing.
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2016-07-09 15:40:25 -04:00 |
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Thomas Harte
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1baf21827c
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Since the ROM is well disassembled, let's actually try to be a 1541 first.
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2016-07-06 22:17:32 -04:00 |
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Thomas Harte
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8819711bc8
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Threw in the second VIA as a currently clearly incorrect thing.
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2016-07-05 22:22:09 -04:00 |
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Thomas Harte
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602e7f01c7
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Control lines seem to have evolved to pure push.
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2016-07-05 21:15:29 -04:00 |
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Thomas Harte
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93c2bb80a2
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Improved a comment, added independent C[A/B]2 input mode.
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2016-07-05 21:11:51 -04:00 |
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Thomas Harte
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1bb109a23b
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Made a quick attempt at basic C[A/B]2 interrupts.
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2016-07-05 20:39:15 -04:00 |
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Thomas Harte
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c3b7d24293
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It appears that the attention line is also wired to CB2. So the ball is back in the 6522's court.
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2016-07-05 19:19:46 -04:00 |
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Thomas Harte
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97751a9d86
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Took the preliminary steps necessary to wire up a serial port.
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2016-07-05 10:55:47 -04:00 |
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Thomas Harte
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88964ceac0
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Eliminated plain pointer passing for object types.
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2016-07-04 19:33:55 -04:00 |
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Thomas Harte
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82b0bc9b58
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Discovered that this is another meaningful usage of using.
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2016-07-04 19:10:10 -04:00 |
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Thomas Harte
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7fa010a463
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Attempted to add support for the most basic of control line output, and slightly to optimise the Vic.
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2016-07-01 19:01:22 -04:00 |
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Thomas Harte
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5c85366de2
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Made an attempt to prevent spurious border colour pushes.
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2016-06-29 21:22:26 -04:00 |
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Thomas Harte
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ff53accca0
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Demonstrated that issue is coloured borders, made a guess as to buffer exhaustion, upped limits as a temporary fix.
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2016-06-29 21:16:34 -04:00 |
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Thomas Harte
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0182b0483a
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Added a 'power on' flag that is set automatically at construction but can be declined. Saves all that stuff of every machine having to set and then unset the RST line, and fixes an Electron bug related to that.
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2016-06-29 19:13:24 -04:00 |
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Thomas Harte
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de5d2f1113
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Ensured the line counter increments late on NTSC.
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2016-06-27 22:12:55 -04:00 |
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Thomas Harte
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69d78dfdb3
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Removed logging.
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2016-06-26 21:36:26 -04:00 |
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Thomas Harte
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843d1fdca7
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Added some extra logging while trying to determine what's going on; added interrupt clearing for the control lines.
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2016-06-26 21:30:06 -04:00 |
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Thomas Harte
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c306d705e1
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Made a quick first attempt at all-the-way-through tape wiring for the Vic.
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2016-06-26 19:43:09 -04:00 |
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Thomas Harte
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37ba42a52f
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Factored out the stuff of playing a tape, started basic sketch of the Vic-related classes.
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2016-06-26 19:03:57 -04:00 |
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Thomas Harte
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066db59773
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Made a hasty attempt to implement CA1 and CB1 input as a potential source of interrupts.
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2016-06-26 16:32:27 -04:00 |
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Thomas Harte
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d5e50f5ea0
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Got a bit more explicit about how ports are identified on the 6522.
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2016-06-26 12:30:01 -04:00 |
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Thomas Harte
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3c9183d034
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Improved some commenting.
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2016-06-23 20:43:29 -04:00 |
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Thomas Harte
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359ffb9aa7
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Made some attempt to implement what appears to be the proper address generation logic.
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2016-06-23 07:32:24 -04:00 |
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Thomas Harte
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b753690d5e
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Made an attempt to adjust the 6560 to a model compatible with that advocated by the available documentation. Exact decision timing may need further work.
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2016-06-21 22:12:01 -04:00 |
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Thomas Harte
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106e56600d
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Added a DC offset for 6560 volume level, albeit one plucked from thin air.
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2016-06-21 07:31:14 -04:00 |
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Thomas Harte
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fe17d1778c
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Expanded 6532 tests substantially, beefing up implementation to match.
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2016-06-20 21:02:42 -04:00 |
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Thomas Harte
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88e2b382e5
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Made an attempt at a full and thorough 6532 implementation (and got a bit more explicit about flag size in the 6502).
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2016-06-20 18:57:35 -04:00 |
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Thomas Harte
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d4b9ff0ca4
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Doubles up on register mirroring. Will do for now. More to come.
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2016-06-20 07:27:38 -04:00 |
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Thomas Harte
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4db61d98f4
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Killed the .cpp.
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2016-06-19 20:21:38 -04:00 |
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Thomas Harte
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7cf6008e7c
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Started some very basic RIOT unit tests; corrected to pass.
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2016-06-19 20:12:47 -04:00 |
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Thomas Harte
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65413f078c
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Factored out the 6532, eventually to make it testable.
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2016-06-19 18:57:40 -04:00 |
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Thomas Harte
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ce2f5515c0
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Made some minor documentation improvements, killed 6522.cpp as the 6522 is going to be a template only, attempting to promote good inlining behaviour.
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2016-06-19 18:11:37 -04:00 |
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Thomas Harte
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f4915c5ad6
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Fixed test and added basic implementation of data direction.
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2016-06-18 17:17:03 -04:00 |
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Thomas Harte
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5d26cd85a3
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Wrote test case for what appears to be correct timer behaviour if those were acting in isolation. Ensured implementation matches test case.
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2016-06-18 14:30:23 -04:00 |
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Thomas Harte
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394902f409
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Switched to clocking the 6522 by the half-cycle. Very trivial test now passes.
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2016-06-18 13:57:10 -04:00 |
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Thomas Harte
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595791cee0
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Made the base 6522 class more abstract: you must now opt-in if you want the IRQ line to be sent to a delegate.
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2016-06-18 08:51:18 -04:00 |
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Thomas Harte
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ce7488dd30
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Added support for _invertedCells. Treading water a little before making real changes.
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2016-06-14 21:06:29 -04:00 |
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Thomas Harte
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926f819e3b
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Added some documentation, made the speaker private.
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2016-06-14 20:00:16 -04:00 |
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Thomas Harte
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a2a6e3c818
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Fixed phase offsets.
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2016-06-14 18:19:06 -04:00 |
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Thomas Harte
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f4884a3481
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Added the noise channel, albeit not very creatively.
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2016-06-14 17:50:32 -04:00 |
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Thomas Harte
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c18cc4c8f5
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It appears the Vic's output is sine-ish, after all. Also adjusted centre of display, simultaneously adding some validation on that.
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2016-06-14 07:29:35 -04:00 |
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Thomas Harte
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fdc854c0c2
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Fixed tone channels; made an attempt at loading PRGs that are supposed to go into RAM.
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2016-06-13 21:49:59 -04:00 |
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Thomas Harte
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efcb196ef7
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Made a complete attempt at the tone channels.
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2016-06-13 20:59:01 -04:00 |
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Thomas Harte
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f1a45c1011
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Merge branch 'VicAudio' into Vic-20
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2016-06-13 19:34:13 -04:00 |
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Thomas Harte
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2d23bc46f2
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Whoops; fixed line count target test.
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2016-06-13 19:34:01 -04:00 |
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Thomas Harte
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5fc36b956c
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Attempted most basic sketching of a container for Vic audio.
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2016-06-13 19:30:52 -04:00 |
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Thomas Harte
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91c406e065
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Made an attempt to honour interlaced-frame line counts.
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2016-06-13 18:21:21 -04:00 |
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Thomas Harte
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2e946e785f
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Settled on half-intensity colour for now, appears likely not to be too incorrect(?)
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2016-06-13 18:20:21 -04:00 |
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Thomas Harte
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e10535181d
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Made an attempt to implement interlaced video.
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2016-06-12 22:27:58 -04:00 |
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Thomas Harte
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4ad55a7f5e
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Trimmed the visible area.
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2016-06-12 18:01:38 -04:00 |
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Thomas Harte
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a5efa7543a
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Added vertical sync, switching fully to the normal NTSC colour space.
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2016-06-12 17:57:52 -04:00 |
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Thomas Harte
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4c2b964cd4
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Added NTSC-VIC's switching of phase every field.
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2016-06-12 17:45:25 -04:00 |
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Thomas Harte
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6b5a322918
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Fixed all colours, plus special case no-chroma for black and white.
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2016-06-12 17:41:52 -04:00 |
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Thomas Harte
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580c8bdcbd
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Ported rest.
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2016-06-12 17:29:44 -04:00 |
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Thomas Harte
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1a2b18f93b
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Steps towards CPU mapping; diagnostic.
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2016-06-12 17:27:57 -04:00 |
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Thomas Harte
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8abf395202
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Experimented with table-based GLSL lookups, and a sine curve. Now _exceedingly_ slow, but colours are correct if I pretend I'm in the YUV colour space.
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2016-06-12 14:57:24 -04:00 |
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Thomas Harte
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2992183aae
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Switched to a lookup table for phase, temporarily in YUV colour space, probably. Working on it.
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2016-06-12 14:39:17 -04:00 |
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Thomas Harte
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ed76e36b18
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Made basic attempt at 16-line character mode.
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2016-06-12 11:23:57 -04:00 |
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Thomas Harte
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d1731b1d26
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Hacked my 6522 to work. Mistake is in not returning output as input when appropriate — i.e. that I'm ignoring data direction. Also fixed K and L keys.
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2016-06-11 13:06:01 -04:00 |
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Thomas Harte
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7a241b5ef5
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Added just enough hopefully to allow implementation of the keyboard-input VIA.
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2016-06-11 11:34:39 -04:00 |
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Thomas Harte
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de84758862
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This is how flags writes are supposed to work, it seems.
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2016-06-11 07:58:32 -04:00 |
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Thomas Harte
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1054793fd7
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Fixed interrupt enable register. This makes a lot more sense!
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2016-06-11 07:57:04 -04:00 |
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Thomas Harte
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82a3c4964b
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Decided to keep the internal copy of the interrupt enable the other way around. Reduced delegate noise.
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2016-06-11 07:49:07 -04:00 |
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Thomas Harte
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a71259dec3
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Gave the 6522 a full and grouped register set.
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2016-06-11 07:12:55 -04:00 |
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Thomas Harte
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1ed04fae1e
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Resolved 6560 addressing.
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2016-06-10 18:12:21 -04:00 |
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Thomas Harte
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f3b1d7de82
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... and that's a flashing cursor. Keyboard input next!
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2016-06-09 22:37:59 -04:00 |
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Thomas Harte
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30b7db3979
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Attempted a square wave, made the Vic itself responsible for address manipulation re:the 6560.
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2016-06-09 22:05:17 -04:00 |
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Thomas Harte
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e99055bedb
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Attempted switching back to a square wave for the composite video and otherwise implementing what's necessary to get to that flashing cursor — the 6560 returns its scan line and the timing bits of the 6522 are appearing.
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2016-06-08 22:15:24 -04:00 |
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Thomas Harte
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581eace478
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Increased logging slightly, ensured all of colour RAM can be read, slightly improved the 2600 pixel decoder.
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2016-06-07 22:01:14 -04:00 |
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Thomas Harte
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26ab96868a
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Decided to turn the 6522 into a template, since it's a per-cycle thing with variable behaviour. Added appropriate memory map callouts to hit the two in the Vic. Though they don't yet do anything.
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2016-06-07 19:15:18 -04:00 |
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Thomas Harte
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6522530e1c
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Actually, I'm dithering over whether the 6522 should be an ordinary class or a curiously-recurring template. But it'll need a file, definitely.
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2016-06-06 21:56:02 -04:00 |
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Thomas Harte
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ca23e2e10a
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This now proceeds to an ostensibly working basic prompt. Colours are wrong, 6560 is probably very wrong, 6522 is still absent. Hence no cursor.
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2016-06-06 20:33:06 -04:00 |
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Thomas Harte
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c7c55528e2
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Realised that registers appear also to be readable.
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2016-06-06 20:29:39 -04:00 |
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Thomas Harte
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e8cb674073
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Made some attempt at colours, at least.
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2016-06-06 20:18:24 -04:00 |
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Thomas Harte
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89c87c3e81
|
Some major hackiness gives the first line of expected text repeating endlessly (as the end of columns is never reached, as that's back to thinking it's 0x7f); I also don't yet know which actor is supposed to do the '+0x8000' (which probably shouldn't be that but might be a pin on the 6560 indicating what sort of value is being fetched, that effects chip select for the various bits of memory?)
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2016-06-06 07:47:30 -04:00 |
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Thomas Harte
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64539a2b24
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Advanced to having some characters displayed, even though they're obviously very much incorrect and the display is still rolling.
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2016-06-06 07:35:35 -04:00 |
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Thomas Harte
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79e05a2413
|
Without yet figuring out what vertical sync is meant to do, moved just about far enough forwards to see _something_ that hopefully I can soon discern characters within.
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2016-06-05 18:02:49 -04:00 |
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Thomas Harte
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444d3b69b6
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Made some elementary attempt to hit something like the correct states within the VIC.
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2016-06-05 17:06:10 -04:00 |
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Thomas Harte
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9e9e50edb1
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Added guess on how colour memory and the 12-bit bus possibly works.
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2016-06-05 16:28:06 -04:00 |
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Thomas Harte
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3be1ce457b
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Made some attempt at discerning fields.
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2016-06-05 14:05:31 -04:00 |
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Thomas Harte
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9566c87532
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Added enough to the machine that the 6560 can now produce output if it wishes.
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2016-06-05 12:11:12 -04:00 |
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Thomas Harte
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f922d38ed2
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The Vic now captures the ROMs sent to it and has just enough infrastructure to get to a black screen. Progress!
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2016-06-05 10:51:07 -04:00 |
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