18 Commits

Author	SHA1	Message	Date
Thomas Harte	012084b37b	Fix exclusive fill, sizing, eliminate ECS call-ins. ... The clock test now proceeds further, but still doesn't seem to pass.	2021-11-24 17:25:32 -05:00
Thomas Harte	47f36f08fb	Switches to a synchronous audio state machine; renames advance -> advance_dma. ... I can worry about how to just-in-time things once I better understand the hardware in general.	2021-11-13 15:53:41 -05:00
Thomas Harte	edb75e69cb	Implement bitplane modulos.	2021-10-29 11:29:22 -07:00
Thomas Harte	07facc0636	Takes a stab at BZERO.	2021-10-28 18:12:46 -07:00
Thomas Harte	b10f5ab110	Apply A mask when loading into barrel shifter.	2021-10-26 20:02:28 -07:00
Thomas Harte	140e24ef15	Grab further copy flags.	2021-09-28 22:11:58 -04:00
Thomas Harte	f6624bf776	Edges mildly closer to line output.	2021-09-26 19:18:12 -04:00
Thomas Harte	b4b6c4d86f	Attempts to support left and right masks.	2021-09-26 18:42:08 -04:00
Thomas Harte	42ef459e20	Resolve resting values.	2021-09-23 22:05:59 -04:00
Thomas Harte	137d1c61bd	Allow for channel enables and blitting direction.	2021-09-23 18:38:37 -04:00
Thomas Harte	adc071ed7a	Fix: modulos are 15-bit signed, the minterms are also in regular BLTCON0.	2021-09-23 18:30:35 -04:00
Thomas Harte	ab69fe56c9	Take a first shot at magical instant blitting.	2021-09-23 18:13:51 -04:00
Thomas Harte	7092429f7c	Added some notes to self on line mode.	2021-09-20 23:08:26 -04:00
Thomas Harte	add11db369	Factors out DMADevice, which is now a parent of Blitter.	2021-09-14 20:51:32 -04:00
Thomas Harte	fd70f7ad43	Attempts to make pixel content observeable.	2021-09-08 20:57:26 -04:00
Thomas Harte	e412927415	Logs a bit more from the Blitter, gives it access to slots.	2021-08-10 07:17:01 -04:00
Thomas Harte	2bc9af09e1	Factors out the chipset.	2021-07-22 21:16:23 -04:00
Thomas Harte	e85db40b0f	Sketches out a blitter class.	2021-07-22 18:43:07 -04:00